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參數資料
型號: AD8042ARZ-REEL
廠商: ANALOG DEVICES INC
元件分類: 音頻/視頻放大
英文描述: Dual 160 MHz Rail-to-Rail Amplifier
中文描述: 1 CHANNEL, VIDEO AMPLIFIER, PDSO8
封裝: LEAD FREE, MS-012AA, SOIC-8
文件頁數: 14/16頁
文件大小: 243K
代理商: AD8042ARZ-REEL
REV. C
–14–
AD8042
HDSL Line Driver
HDSL or high-bit-rate digital subscriber line is becoming popu-
lar as a means to provide data communication at DS1 rates
(1.544 MBPS) over moderate distances via conventional tele-
phone twisted pair wires. In these systems, the transceiver at the
customer’s end is sometimes powered via the twisted pair from
a power source at the central office. It is sometimes required to
raise the dc voltage of the power source to compensate for IR
drops in long lines or lines with narrow gauge wires.
Because of this, it is highly desirable to keep the power consump-
tion of the customer’s transceiver as low as possible. One means
to realize significant power savings is to run the transceiver from
a
±
5 V supply instead of the more conventional
±
12 V.
The high output swing and current drive capability of the
AD8042 make it ideally suited to this application. Figure 12
shows a circuit for the analog portion of an HDSL transceiver
using the AD8042 as the line driver.
2k
3k
232
V
IN
0.001 F
V
OUT
6
5
7
1
4
10
5
ATT
2718AF
93DJ39
34
2k
2k
249
2k
2k
2k
0.001 F
2
3
1
V
REC
1/2
AD8042
2k
3k
2
3
1
1/2
AD8042
912
0.0027 F
2
7
9
6
1/4
AD8044
Figure 12. HDSL Line Driver
LAYOUT CONSIDERATIONS
The specified high speed performance of the AD8042 requires
careful attention to board layout and component selection.
Proper RF design techniques and low-pass parasitic component
selection are necessary.
The PCB should have a ground plane covering all unused
portions of the component side of the board to provide a low
impedance path. The ground plane should be removed from the
area near the input pins to reduce the stray capacitance.
Chip capacitors should be used for the supply bypassing. One
end should be connected to the ground plane and the other
within 1/8 inch of each power pin. An additional large
(0.47
m
F–10
m
F) tantalum electrolytic capacitor should be
connected in parallel, but not necessarily so close, to supply
current for fast, large signal changes at the output.
The feedback resistor should be located close to the inverting
input pin in order to keep the stray capacitance at this node to a
minimum. Capacitance variations of less than 1 pF at the
inverting input will significantly affect high speed performance.
Stripline design techniques should be used for long signal traces
(greater than about one inch). These should be designed with a
characteristic impedance of 50
W
or 75
W
and be properly termi-
nated at each end.
相關PDF資料
PDF描述
AD8042ARZ-REEL7 Dual 160 MHz Rail-to-Rail Amplifier
AD8042 Dual 160 MHz Rail-to-Rail Amplifier
AD8042AN Dual 160 MHz Rail-to-Rail Amplifier
AD8042AR Dual 160 MHz Rail-to-Rail Amplifier
AD8042AR-REEL Dual 160 MHz Rail-to-Rail Amplifier
相關代理商/技術參數
參數描述
AD8042ARZ-REEL7 功能描述:IC OPAMP VF R-R DUAL LP 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:100 系列:- 放大器類型:通用 電路數:1 輸出類型:- 轉換速率:0.2 V/µs 增益帶寬積:- -3db帶寬:- 電流 - 輸入偏壓:100pA 電壓 - 輸入偏移:30µV 電流 - 電源:380µA 電流 - 輸出 / 通道:- 電壓 - 電源,單路/雙路(±):±2 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應商設備封裝:8-SO 包裝:管件
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