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參數資料
| 型號： | AD8063AR-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | 16-Bit, 8-Channel Serial Output Sampling Analog-to-Digital Converter 20-SSOP |
| 中文描述： | OP-AMP, 6000 uV OFFSET-MAX, PDSO8 |
| 封裝： | MS-012AA, SOIC-8 |
| 文件頁數： | 16/16頁 |
| 文件大小： | 314K |
| 代理商： | AD8063AR-REEL |
–16–
C
P
AD8061/AD8062/AD8063
REV. C
5-Lead SOT-23-5
(RT-5)
1
3
2
5
4
0.1220 (3.100)
0.1063 (2.700)
PIN 1
0.0709 (1.800)
0.0590 (1.500)
0.1181 (3.000)
0.0984 (2.500)
0.0748 (1.900)
REF
0.0374 (0.950) REF
0.0197 (0.500)
0.0118 (0.300)
0.0512 (1.300)
0.0354 (0.900)
SEATING
PLANE
0.0571 (1.450)
0.0354 (0.900)
0.0059 (0.150)
0.0000 (0.000)
0.0079 (0.200)
0.0035 (0.090)
0.0236 (0.600)
0.0039 (0.100)
10
0
6-Lead SOT-23-6
(RT-6)
0.122 (3.10)
0.106 (2.70)
PIN 1
0.118 (3.00)
0.098 (2.50)
0.075 (1.90)
BSC
0.037 (0.95) BSC
1
3
4
5
6
2
0.071 (1.80)
0.059 (1.50)
0.009 (0.23)
0.003 (0.08)
0.022 (0.55)
0.014 (0.35)
10
0
0.020 (0.50)
0.010 (0.25)
0.006 (0.15)
0.000 (0.00)
0.051 (1.30)
0.035 (0.90)
SEATING
PLANE
0.057 (1.45)
0.035 (0.90)
8-Lead SOIC
(SO-8)
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
0
0.0196 (0.50)
0.0099 (0.25)
45
8
5
4
1
0.1968 (5.00)
0.1890 (4.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0500 (1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
8-Lead SOIC
(RM-8)
0.009 (0.23)
0.005 (0.13)
0.028 (0.70)
0.016 (0.40)
6
0
0.037 (0.95)
0.030 (0.75)
8
5
4
1
0.122 (3.10)
0.114 (2.90)
PIN 1
0.0256 (0.65) BSC
0.122 (3.10)
0.114 (2.90)
0.193
(4.90)
BSC
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.016 (0.40)
0.010 (0.25)
0.043
(1.10)
MAX
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
AD8061/AD8062/AD8063
–
Revision History
Location
Data Sheet changed from REV. B to REV. C.
Replaced TPC 9 with new graph . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Page
The SELECT signal and the output waveforms for this circuit
are shown in Figure 15. For synchronization clarity, two differ-
ent frequency synthesizers whose time bases are locked to each
other generate the signals.
1V
2V
2 s
SELECT
OUTPUT
Figure 15. AD8063 Mux Output
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