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參數(shù)資料
型號: AD8065AR-REEL
廠商: ANALOG DEVICES INC
元件分類: 音頻/視頻放大
英文描述: High Performance, 145 MHz FastFET⑩ Op Amps
中文描述: 1 CHANNEL, VIDEO AMPLIFIER, PDSO8
封裝: MS-012AA, SOIC-8
文件頁數(shù): 20/28頁
文件大小: 364K
代理商: AD8065AR-REEL
AD8065/AD8066
THERMAL CONSIDERATIONS
With 24 V power supplies and 6.5 mA quiescent current, the
AD8065 dissipates 156 mW with no load. The AD8066
dissipates 312 mW. This can lead to noticeable thermal effects,
especially in the small SOT-23-5 (thermal resistance of
160°C/W). V
OS
temperature drift is trimmed to guarantee a
maximum drift of 17 μV/°C, so it can change up to 0.425 mV
due to warm-up effects for an AD8065/AD8066 in a SOT-23-5
package on 24 V.
Rev. E | Page 20 of 28
I
b
increases by a factor of 1.7 for every 10°C rise in temperature.
I
b
will be close to 5 times higher at 24 V supplies as opposed to a
single 5 V supply.
Heavy loads will increase power dissipation and raise the chip
junction temperature as described in the Maximum Power
Dissipation section. Care should be taken to not exceed the
rated power dissipation of the package.
INPUT AND OUTPUT OVERLOAD BEHAVIOR
The AD8065/AD8066 have internal circuitry to guard against
phase reversal due to overdriving the input stage. A simplified
schematic of the input stage, including the input-protection
diodes and antiphase reversal circuitry, is shown in Figure 56.
The circuit is arranged such that when the input common-
mode voltage exceeds a certain threshold, the input JFET pair’s
bias current will turn OFF, and the bias current of an auxiliary
NPN pair will turn ON, taking over control of the amplifier.
When the input common-mode voltage returns to a viable
operating value, the FET stage turns back ON, the NPN stage
turns OFF, and normal operation resumes.
The NPN pair can sustain operation with the input voltage up
to the positive supply, so this is a pseudo rail-to-rail input stage.
For operation beyond the FET stage’s common-mode limit, the
amplifier’s V
OS
will change to the NPN pair’s offset (mean of
160 μV, standard deviation of 820 μV), and I
b
will increase to the
NPN pair’s base current up to 45 μA (see Figure 32).
Switchback, or recovery time, is about 100 ns, see Figure 27.
The output transistors of the rail-to-rail output stage have
circuitry to limit the extent of their saturation when the output
is overdriven. This helps output recovery time. Output recovery
from a 0.5 V output overdrive on a ±5 V supply is shown in
Figure 24.
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