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參數(shù)資料
| 型號： | AD8129ARZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Low Cost 270 MHz Differential Receiver Amplifiers |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封裝： | LEAD FREE, SOIC-8 |
| 文件頁數(shù)： | 34/40頁 |
| 文件大小： | 549K |
| 代理商： | AD8129ARZ-REEL |
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AD8129/AD8130
Rev. C | Page 34 of 40
R
F
1k
Ω
0.1
μ
F
10
μ
F
–V
V
OUT
+V
0.1
μ
F
10
μ
F
V
IN
R1
100
Ω
C1
200pF
R
G
499
Ω
–V
S
2
PD
+V
S
+
+
AD8130
100
Ω
6
5
4
8
1
3
7
0
Figure 134. An Equalizer Circuit for Composite Video Transmissions
over 300 Meters of Category-5 Cable
20
10
–10
–20
–30
–40
–50
–60
–70
–80
FREQUENCY (Hz)
I
0
10k
100k
1M
10M
100M
0
Figure 135. Transmission Response of 300 Meters of Category-5 Cable
The feedback network is between Pin 6 and Pin 5 and from
Pin 5 to ground. C1 and R
F
create a corner frequency of about
800 kHz. The gain increases to provide about 15 dB of boost
at 8 MHz. The response of this circuit is shown in Figure 136.
20
10
–10
–20
–30
–40
–50
–60
–70
–80
FREQUENCY (Hz)
I
0
10k
100k
1M
10M
100M
0
Figure 136. Frequency Response of Equalizer Circuit
It is difficult to calculate the exact component values via strictly
mathematical means, because the equations for the cable
attenuation are approximate and have functions that are not
simply related to the responses of RC networks. The method
used in this design was to approximate the required response
via graphical means from the frequency response and then
select components that would approximate this response. The
circuit was then built, measured, and finally adjusted to obtain
an acceptable response—in this case, flat to 9 MHz to within
approximately 1 dB (see Figure 137).
20
10
–10
–20
–30
–40
–50
–60
–70
–80
FREQUENCY (Hz)
I
0
10k
100k
1M
10M
100M
0
Figure 137. Combined Response of Cable Plus Equalizer
OUTPUT OFFSET/LEVEL TRANSLATOR
The circuit in Figure 133 has the reference input (Pin 4) tied to
ground, which produces a ground-referenced output signal. If it
is desired to offset the output voltage from ground, the REF
input can be used (see Figure 138). The level V
OFFSET
appears at
the output with unity gain.
0.1
μ
F
–V
V
OUT
= V
IN
+V
OFFSET
+V
0.1
μ
F
10
μ
F
V
IN
V
OFFSET
–V
S
2
PD
+V
S
+
+
AD8130
10
μ
F
6
5
4
8
1
3
7
0
Figure 138. The Voltage Applied to Pin 4 to the Unity-Gain Output Voltage
Produced by V
IN
If the circuit has a gain higher than unity, the gain must be
factored in. If R
G
is connected to ground, the voltage applied to
REF is multiplied by the gain of the circuit and appears at the
output—just like a noninverting conventional op amp. This
situation is not always desirable; the user may want V
OFFSET
to
appear at the output with unity gain.
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