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參數資料
| 型號： | AD8131ARZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Low Cost, High Speed Differential Driver |
| 中文描述： | OP-AMP, 7000 uV OFFSET-MAX, PDSO8 |
| 封裝： | LEAD FREE, MS-012AA, SOIC-8 |
| 文件頁數： | 16/20頁 |
| 文件大小： | 247K |
| 代理商： | AD8131ARZ-REEL |
AD8131
THEORY OF OPERATION
The AD8131 differs from conventional op amps in that it has
two outputs whose voltages move in opposite directions. Like
an op amp, it relies on high open-loop gain and negative
feedback to force these outputs to the desired voltages. The
AD8131 behaves much like a standard voltage feedback op amp
and makes it easy to perform single-ended-to-differential
conversion, common-mode level-shifting, and amplification of
differential signals.
Rev. B | Page 16 of 20
Previous discrete and integrated differential driver designs used
two independent amplifiers and two independent feedback
loops, one to control each of the outputs. When these circuits
are driven from a single-ended source, the resulting outputs are
typically not well balanced. Achieving a balanced output
typically required exceptional matching of the amplifiers and
feedback networks.
DC common-mode level shifting has also been difficult with
previous differential drivers. Level shifting required the use of a
third amplifier and feedback loop to control the output
common-mode level. Sometimes the third amplifier has also
been used to attempt to correct an inherently unbalanced
circuit. Excellent performance over a wide frequency range has
proven difficult with this approach.
The AD8131 uses two feedback loops to separately control the
differential and common-mode output voltages. The differential
feedback, set by internal resistors, controls only the differential
output voltage. The common-mode feedback controls only the
common-mode output voltage. This architecture makes it easy
to arbitrarily set the common-mode output level. It is forced, by
internal common-mode feedback, to be equal to the voltage
applied to the V
OCM
input, without affecting the differential
output voltage.
The AD8131 architecture results in outputs that are very highly
balanced over a wide frequency range without requiring
external components or adjustments. The common-mode
feedback loop forces the signal component of the output
common-mode voltage to be zeroed. The result is nearly
perfectly balanced differential outputs, of identical amplitude
and exactly 180 degrees apart in phase.
ANALYZING AN APPLICATION CIRCUIT
The AD8131 uses high open-loop gain and negative feedback to
force its differential and common-mode output voltages in such
a way as to minimize the differential and common-mode error
voltages. The differential error voltage is defined as the voltage
between the differential inputs labeled +IN and IN in
Figure 39. For most purposes, this voltage can be assumed to be
zero. Similarly, the difference between the actual output
common-mode voltage and the voltage applied to V
OCM
can also
be assumed to be zero. Starting from these two assumptions,
any application circuit can be analyzed.
CLOSED-LOOP GAIN
The differential mode gain of the circuit in Figure 39 can be
described by the following equation:
2
=
=
G
F
dm
IN,
dm
OUT,
V
R
R
V
where
R
F
= 1.5 kΩ and
R
G
= 750 Ω nominally.
ESTIMATING THE OUTPUT NOISE VOLTAGE
Similar to the case of a conventional op amp, the differential
output errors (noise and offset voltages) can be estimated by
multiplying the input referred terms, at +IN and IN, by the
circuit noise gain. The noise gain is defined as
3
1
=
+
=
G
F
N
R
R
G
The total output referred noise for the AD8131, including the
contributions of R
F
, R
G
, and op amp, is nominally 25 nV/√Hz
at 20 MHz.
CALCULATING THE INPUT IMPEDANCE OF AN
APPLICATION CIRCUIT
The effective input impedance of a circuit such as that in
Figure 39, at +D
IN
and D
IN
, will depend on whether the
amplifier is being driven by a single-ended or differential signal
source. For balanced differential input signals, the input
impedance (
R
IN, dm
) between the inputs (+D
IN
and D
IN
) is
Ω
=
×
=
k
5
2
,
G
dm
IN
R
R
In the case of a single-ended input signal (for example if D
IN
is
grounded and the input signal is applied to +D
IN
), the input
impedance becomes
(
)
Ω
=
+
×
=
k
125
.
2
1
,
F
G
F
G
R
dm
IN
R
R
R
R
The input impedance is effectively higher than it would be for a
conventional op amp connected as an inverter because a
fraction of the differential output voltage appears at the inputs
as a common-mode signal, partially bootstrapping the voltage
across the input resistor R
G
.
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| AD8132ARMZ-REEL | Low Cost, High Speed Differential Amplifier |
| AD8132ARMZ-REEL7 | Low Cost, High Speed Differential Amplifier |
| AD8132ARZ | Low Cost, High Speed Differential Amplifier |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD8131ARZ-REEL7 | 功能描述:IC AMP DIFF LDIST 60MA 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:50 系列:LinCMOS™ 放大器類型:通用 電路數:4 輸出類型:- 轉換速率:0.05 V/µs 增益帶寬積:110kHz -3db帶寬:- 電流 - 輸入偏壓:0.7pA 電壓 - 輸入偏移:210µV 電流 - 電源:57µA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):3 V ~ 16 V，±1.5 V ~ 8 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:管件 產品目錄頁面:865 (CN2011-ZH PDF) 其它名稱:296-1834296-1834-5 |
| AD8131-EVAL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low-Cost, High-Speed Differential Driver |
| AD8132 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low-Cost, High-Speed Differential Amplifier |
| AD8132_06 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Cost, High Speed Differential Amplifier |
| AD8132_09 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Cost, High Speed Differential Amplifier |
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