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參數(shù)資料
| 型號： | AD8132 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Low-Cost, High-Speed Differential Amplifier |
| 中文描述： | 低成本，高速差分放大器 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大小： | 391K |
| 代理商： | AD8132 |
REV. 0
AD8132
–13–
OPERATIONAL DESCRIPTION
Definition of Terms
AD8132
C
F
+IN
–
IN
R
F
C
F
R
F
R
G
R
G
+D
IN
V
OCM
–
D
IN
R
L, dm
+OUT
V
OUT, dm
–
OUT
Figure 3. Circuit Definitions
Differential voltage refers to the difference between two node
voltages. For example, the output differential voltage (or
equivalently output differential-mode voltage) is defined as:
V
OUT,dm
=
(
V
+OUT
– V
–OUT
)
V
+OUT
and
V
–OUT
refer to the voltages at the +OUT and –OUT
terminals with respect to a common reference.
Common-mode voltage refers to the average of two node volt-
ages. The output common-mode voltage is defined as:
V
OUT,cm
=
(
V
+OUT
+ V
–OUT
)
/
2
Basic Circuit Operation
One of the more useful and easy to understand ways to use the
AD8132 is to provide two equal-ratio feedback networks. To
match the effect of parasitics, these networks should actually be
comprised of two equal-value feedback resistors, R
F
and two
equal-value gain resistors, R
G
. This circuit is diagrammed in
Figure 3.
Like a conventional op amp, the AD8132 has two differential
inputs that can be driven with both a differential-mode input
voltage, V
IN,dm
, and a common-mode input voltage, V
IN,cm
.
There is another input, V
OCM
, which is not present on conven-
tional op amps, but provides another input to consider on the
AD8132. It is totally separate from the above inputs.
There are two complementary outputs whose response can be
defined by a differential-mode output, V
OUT,dm
and a common-
mode output, V
OUT,cm
.
TEMPERATURE
–
C
D
–
0
–
0.5
–
2.5
–
40
–
20
100
0
20
40
60
80
–
1.0
–
1.5
–
2.0
V
S
= 5V
V
S
= 5V
TPC 59. Differential Offset Voltage vs. Temperature
Table I indicates the gain from any type of input to either type
of output.
Table I. Differential and Common-Mode Gains
Input
V
OUT,dm
R
F
/R
G
0
0
V
OUT,cm
0 (By Design)
0 (By Design)
1 (By Design)
V
IN,dm
V
IN,cm
V
OCM
The differential output (V
OUT,dm
) is equal to the differential
input voltage (V
IN,dm
) times R
F
/R
G
. In this case, it does not
matter if both differential inputs are driven, or only one output
is driven and the other is tied to a reference voltage, like ground.
As can be seen from the two zero entries in the first column,
neither of the common-mode inputs has any effect on this gain.
The gain from V
IN,dm
to V
OUT,cm
is 0 and to first order does not
depend on the ratio matching of the feedback networks. The
common-mode feedback loop within the AD8132 provides a
corrective action to keep this gain term minimized. The term
“balance error” describes the degree to which this gain term
differs from zero.
The gain from V
IN,cm
to V
OUT,dm
does directly depend on the
matching of the feedback networks. The analogous term for this
transfer function, which is used in conventional op amps, is
“common-mode rejection ratio” or CMRR. Thus, if it is desirable
to have a high CMRR, the feedback ratios must be well matched.
The gain from V
IN,cm
to V
OUT,cm
is also ideally 0, and is first-
order independent of the feedback ratio matching. As in the
case of V
IN,dm
to V
OUT,cm
, the common-mode feedback loop
keeps this term minimized.
The gain from V
OCM
to V
OUT,dm
is ideally 0 only when the feed-
back ratios are matched. The amount of differential output
signal that will be created by varying V
OCM
is related to the
degree of mismatch in the feedback networks.
V
OCM
controls the output common-mode voltage V
OUT,cm
with a
unity-gain transfer function. With equal-ratio feedback networks
(as assumed above), its effect on each output will be the same,
which is another way to say that the gain from V
OCM
to V
OUT,dm
is zero. If not driven, the output common-mode will be at mid-
supplies. It is recommended that a 0.1
μ
F bypass capacitor be
connected to V
OCM
.
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