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參數資料
| 型號： | AD8132ARM |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | Low-Cost, High-Speed Differential Amplifier |
| 中文描述： | 1 CHANNEL, VIDEO AMPLIFIER, PDSO8 |
| 封裝： | MO-187AA, MSOP-8 |
| 文件頁數： | 17/20頁 |
| 文件大?。?/td> | 391K |
| 代理商： | AD8132ARM |
REV. 0
AD8132
–17–
10
0
0
–
10
–
20
–
30
–
40
–
50
–
60
–
70
–
80
–
90
–
100
–
110
–
120
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
FUND
2ND
3RD
4TH
5TH
7TH
8TH
9TH
6TH
f
S
= 40MHz
f
IN
= 2.5MHz
INPUT FREQUENCY
–
MHz
O
–
Figure 10. FFT Response for AD8132 Driving AD9203
Balanced Cable Driver
When driving a twisted pair cable, it is desirable to drive only a
pure differential signal onto the line. If the signal is purely dif-
ferential (i.e., fully balanced), and the transmission line is twisted
and balanced, there will be a minimum radiation of any signal.
3V
0.1 F
10 F
+
3V
348
0.1 F
348
49.9
348
24.9
10k
10k
1V p-p
348
60.4
60.4
20pF
20pF
AINN
AINP
AVDD
DRVDD
AVSS
DRVSS
AD9203
DIGITAL
OUTPUTS
3V
0.1 F
0.1 F
AD8132
Figure 9. AD8132 Driving AD9203, a 10-Bit 40 MSPS A/D Converter
APPLICATIONS
A/D Driver
Many of the newer high-speed A/D converters are single-supply
and have differential inputs. Thus, the driver for these devices
should be able to convert from a single-ended to a differential
signal and provide output common-mode level-shifting in
addition to having low distortion and noise. The AD8132 con-
veniently performs these functions when driving the AD9203, a
10-bit, 40 MSPS A/D converter.
In Figure 9 a 1 V p-p signal drives the input of an AD8132
con
fi
gured for unity gain. Both the AD8132 and the AD9203
are powered from a single 3 V supply. A voltage divider biases
V
OCM
at midsupply, which in turn drives V
OUT,cm
to be half the
supply voltage. This is within the common-mode range of the
AD9203.
Between the A/D and the driver is a one-pole, differential
fi
lter
that helps to
fi
lter some of the noise and assists the switched-
capacitor inputs of the A/D. Each of the A/D inputs will be driven
by a 0.5 V p-p signal that goes from 1.25 V dc to 1.75 V dc.
Figure 10 is an FFT plot of the performance of the circuit when
running at a clock rate of 40 MSPS and an input frequency of
2.5 MHz.
499
523
1k
1k
10 F
+
+5V
AD8132
0.1 F
49.9
50
SOURCE
0.1 F
+
0.1 F
10 F
–
5V
49.9
49.9
TWISTED
PAIR
100
1
2
3
4
7
5
AD830
+
0.1 F
10 F
–
5V
10 F
+
+5V
0.1 F
V
OUT
Figure 11. Balanced Line Driver and Receiver Using AD8132 and AD830
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相關代理商/技術參數 |
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| AD8132ARM-EBZ | 功能描述:BOARD EVAL FOR AD8132ARM RoHS:是 類別:編程器，開發系統 >> 評估板 - 運算放大器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- |
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| AD8132ARM-REEL7 | 制造商:Analog Devices 功能描述:SP Amp DIFF AMP Single ±5.5V/11V 8-Pin MSOP T/R 制造商:Analog Devices 功能描述:IC AMP DIFFERENTIAL |
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