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參數資料
| 型號： | AD8133ACPZ-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Triple Differential Driver With Output Pull-Down |
| 中文描述： | TRIPLE LINE DRIVER, QCC24 |
| 封裝： | 4 X 4 MM, LEAD FREE, MO-220VGGD-2, LFCSP-24 |
| 文件頁數： | 13/16頁 |
| 文件大小： | 479K |
| 代理商： | AD8133ACPZ-REEL7 |
AD8133
CALCULATING AN APPLICATION CIRCUIT’S INPUT
IMPEDANCE
The effective input impedance of a circuit such as that in
Figure 34 at V
IP
and V
IN
depends on whether the amplifier is
being driven by a single-ended or differential signal source. For
balanced differential input signals, the differential input imped-
ance, R
IN, dm
, between the inputs V
IP
and V
IN
is simply
Rev. 0 | Page 13 of 16
kΩ
1.5
2
=
×
=
G
dm
IN,
R
R
In the case of a single-ended input signal (for example, if V
IN
is
grounded and the input signal is applied to V
IP
), the input
impedance becomes:
(
)
kΩ
125
.
2
1
=
+
×
=
F
G
F
G
R
dm
IN,
R
R
R
R
The circuit’s input impedance is effectively higher than it would
be for a conventional op amp connected as an inverter because
a fraction of the differential output voltage appears at the inputs
as a common-mode signal, partially bootstrapping the voltage
across the input resistor R
G
.
INPUT COMMON-MODE VOLTAGE RANGE IN SINGLE-
SUPPLY APPLICATIONS
The inputs of the AD8133 are designed to facilitate level-
shifting of ground referenced input signals on a single power
supply. For a single-ended input, this would imply, for example,
that the voltage at V
IN
in Figure 34 would be 0 V when the
amplifier’s negative power supply voltage was also set to 0 V.
It is important to ensure that the common-mode voltage at the
amplifier inputs, V
AP
and V
AN
, stays within its specified range.
Since voltages V
AP
and V
AN
are driven to be essentially equal by
negative feedback, the amplifier’s input common-mode voltage
can be expressed as a single term, V
ACM
. V
ACM
can be calculated
as follows
3
2
ICM
OCM
V
ACM
V
V
+
=
where V
ICM
is the common-mode voltage of the input signal, i.e.,
V
V
V
=
.
2
IN
IP
ICM
+
DRIVING A CAPACITIVE LOAD
A purely capacitive load can react with the output
impedance of the AD8133 to reduce phase margin, resulting in
high frequency ringing in the pulse response. The best way to
minimize this effect is to place a small resistor in series with
each of the amplifier’s outputs to buffer the load capacitance.
OUTPUT PULL-DOWN (OPD)
The AD8133 has an OPD pin that when pulled high signifi-
cantly reduces the power consumed while simultaneously
pulling the outputs to within less than 1 V of V
S
when used
with series diodes (see the Applications section). The equivalent
schematic of the output pull-down circuit is shown in Figure 35.
(The ESD diodes shown in Figure 35 are for ESD protection and
are distinct from the series diodes used with the output pull-
down feature.) See Figure 18 and Figure 21 for the output
pull-down transient and isolation performance plots. The
threshold levels for the OPD pin are referenced to the positive
power supply voltage and are presented in the Specifications
tables. When the OPD pin is pulled high, the AD8133 enters the
output low disable state.
V
OUT
ESD
DIODE
ESD
DIODE
V
CC
PULLDOWN
(OUTPUT IS
PULLED DOWN
WHEN SWITCH
IS CLOSED)
V
S–
0
V
S+
Figure 35. Output Pull-Down Equivalent Circuit
OUTPUT COMMON-MODE CONTROL
The AD8133 allows the user to control each of the three
common-mode output levels independently through the three
V
OCM
input pins. The V
OCM
pins pass a signal to the common-
mode output level of each of their respective amplifiers with
330 MHz of small signal bandwidth and an internally fixed
gain of one. In this way, additional control and communication
signals can be embedded on the common-mode levels as the
user sees fit.
With no external circuitry, the level at the V
OCM
input of each
amplifier defaults to approximately midsupply. An internal
resistive divider with an impedance of approximately 100 k
sets this level. To limit common-mode noise in dc common-
mode applications, external bypass capacitors should be
connected from each of the V
OCM
input pins to ground.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD8134 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Triple Differential Driver With Sync-On-Common-Mode |
| AD8134ACP-R2 | 制造商:Analog Devices 功能描述:SP Amp DIFF Line Driver Amp Triple 制造商:Analog Devices 功能描述:SP AMP DIFF LINE DRVR AMP TRIPLE 6V/6V 24LFCSP EP - Tape and Reel |
| AD8134ACP-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Triple Differential Driver With Sync-On-Common-Mode |
| AD8134ACP-REEL7 | 制造商:Analog Devices 功能描述:SP Amp DIFF Line Driver Amp Triple 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| AD8134ACPZ-R2 | 制造商:Analog Devices 功能描述:SP Amp DIFF Line Driver Amp Triple |
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