
33 × 17, 3.2 Gbps
Digital Crosspoint Switch
AD8151
Rev. B
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2005 Analog Devices, Inc. All rights reserved.
FEATURES
Low cost
33 × 17, fully differential, nonblocking array
3.2 Gbps per port NRZ data rate
Wide power supply range: +3.3 V, –3.3 V
Low power
425 mA (outputs enabled)
35 mA (outputs disabled)
LV PECL- and LV ECL-compatible
CMOS/TTL-level control inputs: 3 V to 5 V
Low jitter
No heat sinks required
Drives a backplane directly
Programmable output current
Optimize termination impedance
User-controlled voltage at the load
Minimize power dissipation
Individual output disable for busing and reducing power
Double row latch
Buffered inputs
184-lead LQFP package
APPLICATIONS
High speed serial backplane routing to Sonet OC-48
applications with FEC
Fiber optic network switching
Fiber channel
LVDS
FUNCTIONAL BLOCK DIAGRAM
OUTP
OUTN
INP
INN
CS
RE
WE
D
A
UPDATE
RESET
FIRST
RANK
17
×
7-BIT
LATCH
SECOND
RANK
17
×
7-BIT
LATCH
INPUT
DECO
DERS
OU
TPU
T
ADDRESS
DECO
DER
33
× 17
DIFFERENTIAL
SWITCH
MATRIX
17
33
7
5
AD8151
02169-
001
Figure 1.
.
GENERAL DESCRIPTION
The AD8151
1 is a member of the Xstream line of products,
offering a breakthrough in digital switching and a large switch
array (33 × 17) on very little power—typically less than 1.5 W.
It also operates at data rates in excess of 3.2 Gbps per port,
making it suitable for Sonet OC-48 applications with
8/10-bit forward-error correction (FEC). Furthermore, the
price of the AD8151 makes it affordable enough to be used for
lower data rates. The AD8151’s flexible supply voltages allow
the user to operate with either emitter-coupled logic (ECL) or
positive emitter-coupled logic (PECL) data levels, and with 3.3
V for further power reduction. The control interface is CMOS-
/TTL-compatible (3 V to 5 V).
Its fully differential signal path reduces jitter and crosstalk,
while allowing the use of smaller, single-ended voltage swings.
The AD8151 is offered in a 184-lead LQFP package that
operates over the extended commercial temperature range
of 0°C to 85°C.
02169-002
70ps/DIV
150mV/D
IV
Figure 2. Eye Pattern, 3.2 Gbps, PRBS 23
1 Patent pending.