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參數(shù)資料
| 型號： | AD8174 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 250 MHz, 10 ns Switching Multiplexers w/Amplifier(高速緩沖多路復(fù)用器) |
| 中文描述： | 250兆赫，10 ns的開關(guān)多路復(fù)用器瓦特/放大器（高速緩沖多路復(fù)用器） |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 428K |
| 代理商： | AD8174 |
–3–
REV. 0
AD8170/AD8174
AD8170A/AD8174A
Min
Typ
Parameter
INPUT CHARACTERISTICS
Input Resistance
Conditions
Max
Units
(+) Switch Input
(–) Buffer Input
Channel Enabled (R Package)
Channel Disabled (R Package)
1.7
100
1.1
1.1
±
3.3
56
52
M
pF
pF
V
dB
dB
Input Capacitance
Input Voltage Range
Input Common-Mode Rejection Ratio
+CMRR,
V
CM
= 1 V
–CMRR,
V
CM
= 1 V
51
50
OUTPUT CHARACTERISTICS
Output Voltage Swing
R
L
= 1 k
, T
MIN
–T
MAX
R
L
= 150
, T
MIN
–T
MAX
R
L
= 10
±
4.0
±
3.5
±
4.26
±
4.0
50
180
10
10
7.5
V
V
mA
mA
m
M
pF
Output Current
Short Circuit Current
Output Resistance
Enabled
Disabled (AD8174)
Disabled (AD8174)
Output Capacitance
POWER SUPPLY
Operating Range
Power Supply Rejection Ratio
±
4
58
55
52
50
±
6
V
dB
dB
dB
dB
mA
mA
mA
°
C
+PSRR
+V
S
= +4.5 V to +5.5 V, –V
S
= –5 V
T
MIN
–T
MAX
–V
S
= –4.5 V to –5.5 V, +V
S
= +5 V
T
MIN
–T
MAX
All Channels “ON”, T
MIN
–T
MAX
AD8174 Disabled, T
MIN
–T
MAX
AD8174 Shutdown, T
MIN
–T
MAX
66
Power Supply Rejection Ratio
–PSRR
58
Quiescent Current
8.7/9.7
4.1
1.5
11/13
5
2.5
+85
OPERATING TEMPERATURE RANGE
–40
NOTES
1
Shutdown (SD) and
ENABLE
pins are grounded (AD8174). IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc. SELECT (A0 or A1 for AD8174) input is
driven with 0 V to +5 V pulse. Measure transition time from 50% of SELECT (A0 or A1) input value (+2.5 V) and 10% (or 90%) of the total output voltage transi-
tion from IN0 (or IN2) channel voltage (+0.5 V) to IN1 (or IN3 = –0.5 V) or vice versa.
2
AD8174 only. Shutdown (SD) pin is grounded.
ENABLE
pin is driven with 0 V to +5 V pulse (5 ns rise and fall times). State of A0 and A1 logic inputs determines
which channel is activated (i.e., if A0 = Logic 0 and A1 = Logic 1, then IN2 input is selected). Set IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc, and mea-
sure transition time from 50% of
ENABLE
pulse (+2.5 V) to 90% of the total output voltage change. In Figure 5,
t
OFF
is the disable time,
t
ON
is the enable time.
3
AD8174 only.
ENABLE
pin is grounded. Shutdown (SD) pin is driven with 0 V to +5 V pulse (5 ns rise and fall times). State of A0 and A1 logic inputs determines
which channel is activated (i.e., if A0 = Logic 1 and A1 = Logic O, then IN1 input is selected). Set IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc, and mea-
sure transition time from 50% of SD pulse (+2.5 V) to 90% of the total output voltage change. In Figure 6,
t
OFF
is the shutdown assert time,
t
ON
is the shutdown
release time.
4
All inputs are grounded. SELECT (A0 or A1 for AD8174) input is driven with 0 V to +5 V pulse. The outputs are monitored. Speeding the edges of the SELECT
(A0 or A1) pulse increases the glitch magnitude due to coupling via the ground plane.
5
Bandwidth of the multiplexer is dependent upon the resistor feedback network. Refer to Table III for recommended feedback component values, which give the best
compromise between a wide and a flat frequency response.
6
Select input(s) that is (are) not being driven (i.e., if SELECT is Logic 1, activated input is IN1; in AD8174, if A0 = Logic 0, A1 = Logic 1, activated input is IN2).
Drive all other inputs with V
IN
= 0.707 V rms, and monitor output at f = 5 MHz and 30 MHz;
R
L
= 100
(see Figure 13).
7
AD8174 only. Shutdown (SD) pin is grounded. Mux is disabled, (i.e.,
ENABLE
= Logic 1) and all inputs are driven simultaneously with V
IN
= 0.354 V rms. Out-
put is monitored at f = 5 MHz and 30 MHz; R
L
= 100
. In this mode, the output impedance of the disabled mux is very high (typ 10 M
), and the signal couples
across the package; the load impedance and the feedback network determine the crosstalk. For instance, in a closed-loop gain of +1, r
OUT
ù
10 M
, in a gain of +2
(R
F
= R
G
= 549
), r
OUT
= 1.1 k
(see Figure 14).
8
AD8174 only.
ENABLE
pin is grounded. Mux is shutdown (i.e., SD = Logic 1), and all inputs are driven simultaneously with V
IN
= 0.354 V rms. Output is moni-
tored at f = 5 MHz and 30 MHz;
R
L
= 100
. (see Figure 14). The mux output impedance in shutdown mode is the same as the disabled mux output impedance.
9
For Gain Accuracy expression, refer to Equation 4.
Specifications subject to change without notice.
Table I. AD8170 Truth Table
SELECT
V
OUT
IN0
IN1
0
1
Table II. AD8174 Truth Table
A0
0
1
0
1
X
X
A1
0
0
1
1
X
X
ENABLE
0
0
0
0
1
X
SD
0
0
0
0
0
1
V
OUT
IN0
IN1
IN2
IN3
HIGH Z, I
S
= 4.1 mA
HIGH Z, I
S
= 1.5 mA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8174AN | 制造商:Analog Devices 功能描述:Analog Multiplexer/Amp Single 4:1 14-Pin PDIP Tube 制造商:Rochester Electronics LLC 功能描述:PDIP 200MHZ 4:1 LOW POWER BUFFERED MUX - Bulk 制造商:Analog Devices 功能描述:IC MUX 4CH 250MHZ 8174 DIP14 |
| AD8174ANZ | 功能描述:IC MUX SW W/AMP 250MHZ 14-DIP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD8174AR | 功能描述:IC MUX W/AMP BUFFERED 14-SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD8174AR-REEL | 制造商:Analog Devices 功能描述:Analog Multiplexer/Amp Single 4:1 14-Pin SOIC N T/R |
| AD8174AR-REEL7 | 功能描述:IC MUX SWITCHNG W/AMP 4:1 14SOIC RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
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