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參數資料
| 型號： | AD8309ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | 5 MHz.500 MHz 100 dB Demodulating Logarithmic Amplifier with Limiter Output |
| 中文描述： | LOG OR ANTILOG AMPLIFIER, 495 MHz BAND WIDTH, PDSO16 |
| 封裝： | TSSOP-16 |
| 文件頁數： | 2/20頁 |
| 文件大小： | 311K |
| 代理商： | AD8309ARU |
REV. B
–2–
AD8309–SPECIFICATIONS
Parameter
Conditions
Min
1
Typ
Max
1
Units
INPUT STAGE
Maximum Input
2
(Inputs INHI, INLO)
Differential Drive, p-p
±
3.5
±
4
+9
+22
1.28
–78
1000
2.5
1.725
V
dBV
dBm
nV/
√
Hz
dBm
pF
V
Equivalent Power in 50
Noise Floor
Equivalent Power in 50
Input Resistance
Input Capacitance
DC Bias Voltage
Terminated in 52.3
Terminated 50
Source
500 MHz Bandwidth
From INHI to INLO
From INHI to INLO
Either Input
800
1200
LIMITING AMPLIFIER
Usable Frequency Range
At Limiter Output
Phase Variation at 100 MHz
Limiter Output Current
(Outputs LMHI, LMLO)
5
500
MHz
MHz
Degrees
mA
%/
°
C
dBV
dBm
V
ns
R
LOAD
= R
LIM
= 50
to –10 dB Point
Over Input Range –60 dBm to +10 dBm
Nominally 400 mV/R
LIM
Versus Temperature –40
°
C
≤
T
A
≤
+85
°
C
875
±
3
1
–0.008
0
10
Input Range
3
–78
–65
1
+9
+22
Equivalent dBm
At Either LMHI or LMLO, wrt VPS2
R
LOAD
≤
50
, 40
≤
R
LIM
≤
400
(Output VLOG)
From Noise Floor to Maximum Input
5 MHz
≤
f
≤
200 MHz
Over Temperature –40
°
C < T
A
< +85
°
C
5 MHz
≤
f
≤
200 MHz
Equivalent dBm (re 50
)
Over Temperature –40
°
C
≤
T
A
≤
+85
°
C
Equivalent dBm (re 50
)
Temperature Sensitivity
Input from –83 dBV (–70 dBm) to +7 dBV (+20 dBm)
Input = –91 dBV (–78 dBm) V
S
= +5 V, +2.7 V
Input = +9 dBV (+22 dBm) V
S
= +5 V
Input = +9 dBV (+22 dBm) V
S
= +2.75 V
Maximum Output Voltage
Rise/Fall Time (10%–90%)
1.25
0.4
LOGARITHMIC AMPLIFIER
±
3 dB Error Dynamic Range
Transfer Slope
100
20
20
–108
–95
–108
–95
–0.009
±
0.4
0.34
2.34
2.10
50
1.0
0.3
3.5
dB
mV/dB
mV/dB
dBV
dBm
dBV
dBm
dB/
°
C
dB
V
V
V
mA
MHz
18
17
–116
–103
–117
–104
22
23
–100
–87
–99
–86
Intercept (Log Offset)
Linearity Error (Ripple)
Output Voltage
2.75
Minimum Load Resistance, R
L
Maximum Sink Current
Output Resistance
Small-Signal Bandwidth
Output Settling Time to 1%
40
0.75
To Ground
1.25
Large Scale Input, +3 dBV (+16 dBm),
R
L
≥
50
, C
L
≤
100 pF
Large Scale Input, +3 dBV (+16 dBm),
R
L
≥
50
, C
L
≤
100 pF
120
220
ns
Rise/Fall Time (10%–90%)
67
100
ns
POWER INTERFACES
Supply Voltage, V
POS
Quiescent Current
Over Temperature
Disable Current
Additional Bias for Limiter
Logic Level to Enable Power
Input Current when HI
Logic Level to Disable Power
2.7
13
11
5
16
16
0.01
1.4
6.5
20
23
4
1.6
V
POS
60
1
V
mA
mA
μ
A
mA
V
μ
A
V
Zero-Signal, LMDR Open
–40
°
C < T
A
< +85
°
C
–40
°
C < T
A
< +85
°
C
R
LIM
= 400
(See Text)
HI Condition, –40
°
C < T
A
< +85
°
C
3 V at ENBL, –40
°
C < T
A
< +85
°
C
LO Condition, –40
°
C < T
A
< +85
°
C
1.8
40
–0.5
NOTES
1
Minimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values.
2
The input level is specified in “dBV” since logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of
1 V rms. A power level of 0 dBm (1 mW) in a 50
termination corresponds to an input of 0.2236 V rms. Hence, the relationship between dBV and dBm is a fixed
offset of +13 dBm in the special case of a 50
termination.
3
Due to the extremely high Gain Bandwidth Product of the AD8309, the output of either LMHI or LMLO will be unstable for levels below –78 dBV (–65 dBm, re 50
).
Specifications subject to change without notice.
(V
S
= +5 V, T
A
= +25
8
C, unless otherwise noted)
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