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參數(shù)資料
| 型號： | AD8321AR-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Gain Programmable CATV Line Driver |
| 中文描述： | LINE DRIVER, PDSO20 |
| 封裝： | MS-013AC, SOIC-20 |
| 文件頁數(shù)： | 4/19頁 |
| 文件大小： | 660K |
| 代理商： | AD8321AR-REEL |
AD8321
–4–
REV. 0
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8321 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE
Model
Temperature Range
–40
°
C to +85
°
C
–40
°
C to +85
°
C
Package Description
u
JA
58
°
C/W*
58
°
C/W*
Package Option
AD8321AR
AD8321AR-REEL
AD8321-EVAL
20-Lead SOIC
20-Lead SOIC
Evaluation Board
R-20
R-20
*Thermal Resistance measured on SEMI standard 4-layer board.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage +V
S
Pins 7, 8, 9, 17, 20 . . . . . . . . . . . . . . . . . . . . . . . . . . . +11 V
Input Voltages
Pins 18, 19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
0.5 V
Pins 1, 2, 3, 6 . . . . . . . . . . . . . . . . . . . . . . –0.8 V to +5.5 V
Internal Power Dissipation
Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.90 W
Operating Temperature Range . . . . . . . . . . . –40
°
C to +85
°
C
Storage Temperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature, Soldering 60 seconds . . . . . . . . . . +300
°
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
AD8321
VOUT
VCC
VCC
CLK
DATEN
GND
VCC
PD
BYP1
GND
GND
VIN–
VCC
BYP2
GND
GND
SDATA
VCC
GND
VIN+
PIN FUNCTION DESCRIPTIONS
Pin
Function
Description
1
SDATA
Serial Data Input. This digital input allows for an 8-bit serial (gain) word to be loaded into the internal
register with the MSB (most significant bit) first.
Clock Input. The clock port controls the serial attenuator data transfer rate to the 8-bit master-slave
register. A Logic 0-to-1 transition latches the data bit and a 1-to-0 transfers the data bit to the slave.
This requires the input serial data word to be valid at or before this clock transition.
Data Enable Low Input. This port controls the 8-bit parallel data latch and shift register. A Logic 0-to-
1 transition transfers the latched data to the attenuator core (updates the gain) and simultaneously
inhibits serial data transfer into the register. A 1-to-0 transition inhibits the data latch (holds the previ-
ous gain state) and simultaneously enables the register for serial data load.
2
CLK
3
DATEN
4, 11, 12,
13, 15, 16
5
GND
BYP1
Common External Ground Reference.
V
CC
/2 Reference Pin. A dc output reference level that is equal to 1/2 of the supply voltage (VCC). This
port should be externally ac-decoupled (0.1
μ
F capacitor). For external use of this reference voltage,
buffering is required.
Power-Down Low Logic Input. A Logic 0 powers down (shuts off) the power amplifier disabling the
output signal and enabling the reverse amplifier. A Logic 1 enables the output power amplifier and
disables the reverse amplifier.
Common Positive External Supply Voltage.
Output Signal Port. DC-biased to approximately V
CC
/2.
Internal Bypass. This pin must be externally ac-decoupled (0.1
μ
F cap).
Noninverting Input. DC-biased to approximately V
CC
/2. For single-ended inverting operation, use
0.1
μ
F decoupling capacitor between VIN+ and ground.
Inverting Input. DC-biased to approximately V
CC
/2. Should be ac-coupled with a 0.1
μ
F capacitor.
6
PD
7, 8, 9, 17, 20
10
14
18
VCC
VOUT
BYP2
VIN+
19
VIN–
WARNING!
ESD SENSITIVE DEVICE
相關PDF資料 |
PDF描述 |
|---|---|
| AD8321-EVAL | Gain Programmable CATV Line Driver |
| AD8321AR | Gain Programmable CATV Line Driver |
| AD8322ARU-REEL | 5 V CATV Line Driver Coarse Step Output Power Control |
| AD8322-EVAL | 5 V CATV Line Driver Coarse Step Output Power Control |
| AD8322ARU | 5 V CATV Line Driver Coarse Step Output Power Control |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD8321ARZ | 功能描述:IC LINE DRIVER CATV 3.3V 20SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| AD8321ARZ2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Gain Programmable CATV Line DRiver |
| AD8321ARZ-REEL | 功能描述:IC LINE DVR CATV 20-SOIC T/R RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| AD8321ARZ-REEL2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Gain Programmable CATV Line DRiver |
| AD8321-EVAL | 功能描述:BOARD EVAL FOR AD8321 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
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