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參數(shù)資料
型號(hào): AD8343-EVAL
廠商: Analog Devices, Inc.
英文描述: DC-to-2.5 GHz High IP3 Active Mixer
中文描述: DC至2.5GHz的高IP3有源混頻器
文件頁(yè)數(shù): 20/27頁(yè)
文件大小: 394K
代理商: AD8343-EVAL
REV. 0
AD8343
–20–
0.2
0.5
1.0
5.0
2.0
0.2
0.5
1.0
2.0
0
5.0
3.3pF SHUNT CAPACITOR
5mm 50 TRACE
FREQUENCY = 1.8GHz
Figure 20. Effect of 50
PCB Trace on 50
Real
Impedance Load
With the reference plane extended to the location of the series
matching components, it may now be necessary to readjust the
shunt capacitance value to achieve the desired 50
real imped-
ance. However, this rotation will not be very noticeable if the
board traces are fairly short or the application frequency is low.
As before, calculate the series capacitance value required to
move in the direction shown as step two in Figure 19, choose
the nearest standard component remembering to perform the
differential conversion, and install on the board. Again, if any
unexpected impedance transformations occur the reference
planes were probably extended incorrectly making it necessary
to readjust these planes.
This value of series capacitance should be adjusted to obtain the
desired value of differential impedance.
The above steps may be applied to any of the previously dis-
cussed matching topologies suitable for the AD8343. Also, if a
non-50
target impedance is required, simply calculate and
adjust the components to obtain the desired load impedance.
Caution: If the matching network topology requires a differen-
tial shunt inductor between the inputs, it may be necessary to
place a series blocking capacitor of low reactance in series with
the inductor to avoid creating a low resistance dc path between
the input terminals of the AD8343. Failure to heed this warning
will result in very poor LO-output isolation
Step 5: Transfer the Matching Network to the Final Design
On the
B
side of the AD8343 evaluation board, install the
matching network and the input balun. Install the same output
network as used for the work on the
A
side, then power up
the board and measure the input return loss at the RF input
connector on the board. Strictly speaking, the above procedure
(if carried out accurately) for matching the AD8343 will obtain
the best conversion gain; this
may
differ materially from the
condition which results in best return loss at the board
s input if
the balun is lossy.
If the result is not as expected, the balun is probably producing
an unexpected impedance transformation. If the performance is
extremely far from the desired result and it was assumed that
the output impedance of the balun was 50
, it may be neces-
sary to measure the output impedance of the balun in question.
The design process should be repeated using the balun
s output
impedance instead of 50
as the target. However, if the perfor-
mance is close to the desired result it should be possible to
tweak
the values of the matching network to achieve a satisfactory
outcome. These changes should begin with a change from one
standard value to the adjacent standard value. With these
minor modifications to the matching network, one is able to
evaluate the trend required to reach the desired result.
If the result is unsatisfactory and an acceptable compromise
cannot be reached by further adjustment of the matching net-
work, there are two options: obtain a better balun, or attempt
a simultaneous conjugate match to both ports of the balun.
Accomplishing the latter (or even evaluating the prospects for
useful improvement) requires obtaining full two-port single-
ended-to-differential S parameters for the balun, which requires
the use of the ATN 4000 or similar multiport network analyzer
test set. Gonzalez presents formulas for calculating the simulta-
neous conjugate match in the section entitled,
Simultaneous
Conjugate Match: Bilateral Case
in his book,
Microwave
Transistor Amplifiers.
At higher frequencies the measurement process described above
becomes increasingly corrupted by unaccounted for impedance
transformations occurring in the traces and pads between the
input connectors and the extended reference plane. One approach
to dealing with this problem is to access the desired measurement
points by soldering down semirigid coax cables that have been
connected to the VNA and directly calibrated at the free ends.
APPLICATIONS
Downconverting Mixer
A typical downconversion application is shown in Figure 21
with the AD8343 connected as a receive mixer. The input
single-ended-to-differential conversion is obtained through the
use of a 1:1 transmission line balun. The input matching net-
work is positioned between the balun and the input pins, while
the output is taken directly from a 4:1 impedance ratio (2:1
turns ratio) transformer. The local oscillator signal at a level of
12 dBm to
3 dBm is brought in through a second 1:1 balun.
LO IN
10dBm
1:1
V
POS
4.71
0.1 F
AD8343
VPOS
DCPL
PWDN
LOIP
LOIM
INPP
INPM
OUTM
OUTP
COMM
IF
OUT
FB
4:1
BIAS
V
POS
R1
A
68
L1
A
L1
B
R1
B
68
R
FIN
Z1
Z2
A
Z2
B
FERRITE
BEAD
1:1
Figure 21. Typical Downconversion Application
相關(guān)PDF資料
PDF描述
AD8343ARU DC-to-2.5 GHz High IP3 Active Mixer
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD8343-EVALZ 制造商:Analog Devices 功能描述:AD8343 EVALUATION BOARD - Bulk
AD8344 制造商:AD 制造商全稱:Analog Devices 功能描述:Active Receive Mixer 400 MHz to 1.2 GHz
AD8344ACPZ 制造商:Analog Devices 功能描述:UP/DOWN CONV MIXER 5V 1.2GHZ 16LFCSP EP - Tape and Reel 制造商:Analog Devices 功能描述:IC SM RF MIXER 800MHZ
AD8344ACPZ 制造商:Analog Devices 功能描述:IC RF MIXER 800MHZ SMD LFCSP-16
AD8344ACPZ-REEL7 功能描述:IC MIXER 400MHZ-1.2GHZ 16-LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 混頻器 系列:AD8344 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數(shù)目:1 增益:17dB 噪音數(shù)據(jù):2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤 封裝/外殼:12-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:12-QFN-EP(3x3)
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