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參數資料
型號: AD8345-EVAL
廠商: Analog Devices, Inc.
英文描述: 250 MHz.1000 MHz Quadrature Modulator
中文描述: 250 MHz.1000兆赫正交調制器
文件頁數: 2/16頁
文件大小: 372K
代理商: AD8345-EVAL
REV. 0
–2–
AD8345–SPECIFICATIONS
(V
S
= 5 V; LO= –2 dBm @ 800 MHz, 50 source and load impedances, I and Q inputs
0.7 V 0.3 V on each side for a 1.2 V p-p differential input, I and Q inputs driven in quadrature @ 1 MHz Baseband Frequency.
T
A
= 25 C, unless otherwise noted.)
Parameters
Conditions
Min
Typ
Max
Unit
RF OUTPUT
Operating Frequency
1
Output Power
Output P1 dB
Noise Floor
250
–3
1000
+2
MHz
dBm
dBm
dBm/Hz
–1
2.5
–155
20 MHz Offset from LO, All BB
Inputs at 0.7 V
(CDMA IS95 Setup, Refer to Figure 13)
(CDMA IS95 Setup, Refer to Figure 13)
Quadrature Error
I/Q Amplitude Balance
LO Leakage
Sideband Rejection
Third Order Distortion
Second
Order Distortion
Equivalent Output IP3
Equivalent Output IP2
Output Return Loss (S22)
0.5
0.2
–42
–42
–52
–60
25
59
–20
Degree rms
dB
dBm
dBc
dBc
dBc
dBm
dBm
dB
–33
–34
RESPONSE TO CDMA IS95
BASEBAND SIGNALS
ACPR
EVM
Rho
(Refer to Figure 13)
–72
1.3
0.9995
dBc
%
LO INPUT
LO Drive level
LOIP Input Return Loss (S11)
2
–10
–2
0
dBm
No Termination on LOIP, LOIN at
AC Ground
50
Terminating Resistor, Differential
Drive via Balun
–5
dB
–9
dB
BASEBAND INPUTS
Input Bias Current
Input Capacitance
DC Common Level
Bandwidth (3 dB)
10
2
0.7
80
μ
A
pF
V
MHz
0.6
0.8
Full Power (0.7 V
±
0.3 V on Each
Input, Refer to TPC 2)
ENABLE
Turn-On
Enable High to Output within 0.5 dB of
Final Value
Enable Low to Supply Current Dropping
below 2 mA
2.5
μ
s
Turn-Off
1.5
μ
s
ENBL High Threshold (Logic 1)
ENBL Low Threshold (Logic 0)
+V
S
/2
+V
S
/2
V
V
POWER SUPPLIES
Voltage
Current Active
Current Standby
2.7
50
5.5
78
V
mA
μ
A
65
70
NOTES
1
For information on operation below 250 MHz, see Figure 4.
2
See LO Drive section for more details on input matching.
Specifications subject to change without notice.
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