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參數資料
| 型號： | AD8347 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 0.8 GHz-2.7 GHz Direct Conversion Quadrature Demodulator |
| 中文描述： | 0.8千兆赫- 2.7 GHz直接轉換正交解調器 |
| 文件頁數： | 13/20頁 |
| 文件大小： | 750K |
| 代理商： | AD8347 |
REV. 0
AD8347
–13–
RFIN
VREF
RFIP
VPS2
IMXO
COM3
IOPP
IOFS
IOPN
VCMO
VPS1
LOIN
IAIN
COM2
QOPN
COM3
VGIN
ENBL
LOIP
COM1
VPS3
AD8347
PHASE
SPLITTER
1
BIAS
CELL
DET 1
VREF
VREF
GAIN
CONTROL
INTERFACE
DET 2
VREF
VCMO
PHASE
SPLITTER
2
VCMO
VDT2
QMXO
QOPP
QOFS
VAGC
VDT1
QAIN
Figure 3. Block Diagram
CIRCUIT DESCRIPTION
OVERVIEW
The AD8347 is a direct I/Q demodulator usable in digital
wireless communication systems including Cellular, PCS, and
Digital Video receivers. An RF signal in the frequency range of
800 MHz–2700 MHz is directly downconverted to the I & Q
components at baseband using a Local Oscillator (LO) signal at
the same frequency as the RF signal.
The RF input signal goes through two stages of variable gain
amplifiers before splitting up to reach two Gilbert-cell Mixers.
The mixers are driven by a pair of Local Oscillator (LO)
signals which are in quadrature (90 degrees of phase difference).
The outputs of the mixers are applied to baseband I & Q channel
variable-gain amplifiers. The outputs from these baseband
variable
gain amplifiers are brought out to pins for external
filtering.
The filter outputs are then applied to a pair of on-chip,
fixed-gain
baseband amplifiers. These amplifiers gain up the
outputs from the external filters
to a level compatible with most
A-to-D Converters.
A sum-of-squares detector is available for
use in an Automatic Gain Control (AGC) loop to set the output
level. The RF and baseband amplifiers provide approximately
69.5 dB of gain control range. Additional on-chip circuits allow
the setting of the dc level at the I & Q channel baseband out-
puts, as well as nulling the dc offset at each channel.
RF Variable Gain Amplifiers (VGA)
These amplifiers use the patented X-AMP
approach with NPN-
differential pairs separated by sections of resistive attenuators.
The gain control is achieved through a gaussian interpolator
where the control voltage sets the tail currents to be supplied to
the different differential pairs according to the gain desired. In
the first amplifier, the combined output currents from the trans-
conductance cells go through a cascode stage to resistive loads
with inductive peaking. In the second amplifier the differential
currents are split and fed to the two Gilbert-cell mixers through
separate cascode stages.
Mixers
Two double balanced Gilbert-cell mixers, one for each channel,
perform the In-phase (I) and Quadrature (Q) down conversion.
Each mixer has four cross-connected transistor pairs which are
terminated in resistive loads and feed the differential baseband
variable gain amplifiers for each channel. The bases of the mixer
transistors are driven by the quadrature LO signals.
Baseband Variable Gain Amplifiers
The baseband VGA’s also use the X-AMP approach with NPN-
differential pairs separated by sections of resistive attenuators.
The same interpolator controlling the RF amplifiers controls the
tail currents of the differential pairs. The outputs of these ampli-
fiers are provided off chip for external filtering. Automatic offset
nulling minimizes the dc offsets at both I & Q channels. The
common-mode output voltage is set to be the same as the reference
voltage (1.0 V) generated in the Bias section, also made available
at the VREF pin.
Output Amplifiers
The output amplifiers gain up the signal coming back from each
of the external filters to a level compatible with most high speed
A-to-D converters. These amplifiers are based on an active-feedback
design to achieve the high gain bandwidth and low distortion.
LO and Phase-Splitters
The incoming LO signal is applied to a polyphase phase-splitter
to generate the LO signals for the I channel and Q channel
mixers. The polyphase phase-splitters are RC networks con-
nected in a cyclical manner to achieve gain balance and phase
quadrature. The wide operating frequency range of these phase-
splitters is achieved by cascading multiple sections of these
networks with staggered RC constants. Each branch goes through
a buffer to make up for the loss and high frequency roll-off. The
output from the buffers then go into another polyphase phase-
splitter to enhance the accuracy of phase quadrature. Each LO
signal gets buffered again to drive the mixers.
Output Level Detector
Two signals proportional to the square of each output channel
are summed together and compared to a built-in threshold to
create an AGC voltage (VAGC). The inputs to this rms detector
are referenced to VREF.
Bias
An accurate reference circuit generates the reference currents
used by the different sections. The reference circuit is controlled
by an external power-up (ENBL) logic signal which, when set
low, puts the whole chip into a sleep mode typically requiring
X-AMP is a registered trademark of Analog Devices, Inc.
相關PDF資料 |
PDF描述 |
|---|---|
| AD8347-EVAL | 0.8 GHz-2.7 GHz Direct Conversion Quadrature Demodulator |
| AD8347ARU | 0.8 GHz-2.7 GHz Direct Conversion Quadrature Demodulator |
| AD8347ARU-REEL7 | 0.8 GHz-2.7 GHz Direct Conversion Quadrature Demodulator |
| AD8348 | 50-1000 MHz Quadrature Demodulator |
| AD8348-EVAL | 50-1000 MHz Quadrature Demodulator |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD8347ARU | 功能描述:IC QUADRATURE DEMOD 28-TSSOP RoHS:否 類別:RF/IF 和 RFID >> RF 解調器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 功能:解調器 LO 頻率:- RF 頻率:70MHz ~ 300MHz P1dB:-9dBm 增益:- 噪音數據:6.36dB 電流 - 電源:41.5mA 電源電壓:2.7 V 封裝/外殼:28-WFQFN 裸露焊盤 供應商設備封裝:28-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| AD8347ARU-REEL | 制造商:Analog Devices 功能描述:Quadrature Dmod 65MHz 28-Pin TSSOP T/R |
| AD8347ARU-REEL7 | 功能描述:IC QUADRATURE DEMOD 28-TSSOP RoHS:否 類別:RF/IF 和 RFID >> RF 解調器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 功能:解調器 LO 頻率:- RF 頻率:70MHz ~ 300MHz P1dB:-9dBm 增益:- 噪音數據:6.36dB 電流 - 電源:41.5mA 電源電壓:2.7 V 封裝/外殼:28-WFQFN 裸露焊盤 供應商設備封裝:28-TQFN-EP（5x5） 包裝:帶卷 (TR) |
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