
AD8361
–12–
REV. A
Alternatively, a reactive match can be implemented using a shunt
inductor to ground and a series capacitor as shown in Figure
39c. A method for hand calculating the appropriate matching
components is shown on page 12 of the AD8306 data sheet.
Matching in this manner results in very small values for C
M
,
especially at high frequencies. As a result, a stray capacitance as
small as 1 pF can signi
fi
cantly degrade the quality of the match.
The main advantage of a reactive match is the increase in sensi-
tivity that results from the input voltage being
“
gained up
”
(by
the square root of the impedance ratio) by the matching network.
Table III shows recommended values for reactive matching.
Table III. Recommended Values for a Reactive Input Match
(Figure 39c)
Frequency
MHz
C
M
pF
L
M
nH
100
800
900
1800
1900
2500
16
2
2
1.5
1.5
1.5
180
15
12
4.7
4.7
3.3
Input Coupling Using a Series Resistor
Figure 39d shows a technique for coupling the input signal
into the AD8361, which may be applicable where the input signal
is much larger than the input range of the AD8361. A series
resistor combines with the input impedance of the AD8361 to
attenuate the input signal. Since this series resistor forms a
divider with the frequency-dependent input impedance, the
apparent gain changes greatly with frequency. However, this
method has the advantage of very little power being
“
tapped
off
”
in RF power transmission applications. If the resistor is large
compared to the transmission line
’
s impedance then the VSWR of
the system is relatively unaffected.
FREQUENCY
–
MHz
200
0
500
R
–
100
0
250
150
50
1000
1500
2000
2500
3000
3500
0.2
0.5
0.8
1.1
1.4
1.7
C
–
Figure 40. Input Impedance vs. Frequency, Supply 3 V,
SOT-23-6L
Selecting the Filter Capacitor
The AD8361
’
s internal 27 pF
fi
lter capacitor is connected in
parallel with an internal resistance that varies with signal level
from 2 k
for small signals to 500
for large signals. The
resulting low-pass corner frequency between 3 MHz and 12 MHz
provides adequate
fi
ltering for all frequencies above 240 MHz
(i.e., ten times the frequency at the output of the squarer, which
is twice the input frequency). However, signals with high peak-
to-average ratios, such as CDMA or W-CDMA signals, and
with low frequency components, require additional
fi
ltering.
TDMA signals, such as GSM, PDC, or PHS have a peak-to-
average ratio that is close to that of a sinusoid, and the internal
fi
lter is adequate.
The
fi
lter capacitance of the AD8361 can be augmented by
connecting a capacitor between Pin 6 (FLTR) and VPOS.
Table IV shows the effect of several capacitor values for various
communications standards with high peak-to-average ratios along
with the residual ripple at the output, in peak-to-peak and rms
volts. Note that large
fi
lter capacitors will increase the enable
and pulse response times, as discussed below.
Table IV. Effect of Waveform and C
FILT
on Residual AC
Output
V dc
Residual AC
mV p-p
Waveform
C
FILT
Open
mV rms
IS95 Reverse Link
0.5
1.0
2.0
0.5
1.0
2.0
0.5
1.0
2.0
0.5
1.0
2.0
0.5
1.0
2.0
0.5
1.0
2.0
0.5
1.0
2.0
550
1000
2000
40
160
430
20
40
110
290
975
2600
50
190
670
225
940
2500
45
165
550
100
180
360
6
20
60
3
6
18
40
150
430
7
30
95
35
135
390
6
25
80
0.01
μ
F
0.1
μ
F
IS95 8-Channel
Forward Link
0.01
μ
F
0.1
μ
F
W-CDMA 15
Channel
0.01
μ
F
0.1
μ
F
Operation at Low Frequencies
Although the AD8361 is speci
fi
ed for operation up to 2.5 GHz,
there is no lower limit on the operating frequency. It is only nec-
essary to increase the input coupling capacitor to reduce the
corner frequency of the input high-pass
fi
lter (use an input resis-
tance of 225
for frequencies below 100 MHz). It is also
necessary to increase the
fi
lter capacitor so that the signal at the
output of the squaring circuit is free of ripple. The corner fre-
quency will be set by the combination of the internal resistance of
2 k
and the external
fi
lter capacitance.
Power Consumption, Enable and Power-On
The quiescent current consumption of the AD8361 varies with
the size of the input signal from about 1 mA for no signal up to
7 mA at an input level of 0.66 V rms (9.4 dBm re 50
). If the
input is driven beyond this point, the supply current increases
steeply (see Figure 12). There is little variation in quiescent
current with power supply voltage.