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參數(shù)資料
| 型號(hào)： | AD8367ARU-REEL-7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | 500 MHz, Linear-in-dB VGA with AGC Detector |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 607K |
| 代理商： | AD8367ARU-REEL-7 |
REV. 0
AD8367
–10–
Power and Voltage Metrics
Although power is the traditional metric used in the analysis of
cascaded systems, most active circuit blocks fundamentally
respond to voltage. The relationship between power and voltage
is defined by the impedance level. When input and output imped-
ance levels are the same, power gain and voltage gain are identical.
However, when impedance levels change between input and
output, they differ. Thus, one must be very careful to use the
appropriate gain for system chain analyses. Quantities such as
OIP3 are quoted in dBV rms as well as dBm referenced to 200
.
The dBV rms unit is defined as decibels relative to 1 V rms. In a
200
environment, the conversion from dBV rms to dBm requires
the addition of 7 dB to the dBV rms value. For example, a
+2 dBV rms level corresponds to +9 dBm.
Noise and Distortion
Since the AD8367 consists of a passive variable attenuator
followed by a fixed gain amplifier, the noise and distortion
characteristics as a function of the gain voltage are easily pre-
dicted. The input-referred noise increases in proportion to the
attenuation level. Figure 4 shows noise figure, NF, as a func-
tion of V
GAIN
for the MODE pin pulled high. The minimum
NF of 7.5 dB occurs at maximum gain and increases 1 dB for
every 1 dB reduction in gain. In receiver applications, the
minimum NF should occur at the maximum gain where the
received signal presumably is weak. At higher levels, a lower
gain is needed, and the increased NF becomes less important.
V
GAIN
–
V
0
1.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
60
50
–
30
I
–
10
0
–
10
–
20
30
20
40
60
50
–
30
N
–
10
0
–
10
–
20
30
20
40
NF
IIP3
Figure 4. Noise Figure and Input Third Order Inter-
cept vs. Gain (R
SOURCE
200
)
The input-referred distortion varies in a similar manner to the
noise. Figure 4 illustrates how the third-order intercept point at
the input, IIP3, behaves as a function of V
GAIN
. The highest IIP3
of 20 dBV rms (27 dBm re 200
) occurs at minimum gain. The
IIP3 then decreases 1 dB for every 1 dB increase in gain. At lower
levels, a degraded IIP3 is acceptable. Overall, the dynamic range,
represented by the difference between IIP3 and NF, remains
reasonably constant as a function of gain. The output distortion
and compression are essentially independent of the gain. At low
gains, when the input level is high, input overload may occur,
causing premature distortion.
Output Centering
The output level is centered midway between ground and the
supply if the DECL pin is left floating. Alternatively, the out-
put level may be set by driving the DECL pin with the desired
reference level. As shown in Figure 5, the loop acts to suppress
deviations from the reference at outputs below its corner
frequency while not affecting signals above it. The maximum
corner frequency with no external capacitor is 500 kHz. The
corner frequency can be lowered arbitrarily by adding an exter-
nal capacitor, C
HP
:
f
C
HP
HP
(kHz)
(nF)+0 02
=
10
(3)
A capacitor at pin DECL is recommended to decouple the
reference level to which the output is centered.
g
m
HPFL
DECL
A
V
1
V
MID
VOUT
FROM
INPUT
MAIN
AMPLIFIER
C
HP
Figure 5. The dc output level is centered to mid
supply by a control loop whose corner frequency is
determined by C
HP
.
RMS Detection
The AD8367 contains a square-law detector that senses the output
signal and compares it to a calibrated set-point of 354 mV rms
which corresponds to a 1 V p-p sine wave. Any difference between
the output and set-point generates a current which is integrated by
an external capacitor, C
AGC
, connected from the DETO pin to
ground, to provide an AGC control voltage. There is also an
internal 5 pF capacitor on the DETO pin.
The resulting voltage is used as an AGC bias. For this appli-
cation, the MODE pin is pulled low and the DETO pin is
tied to the GAIN pin. The output signal level is then regu-
lated to 354 mV rms. The AGC bias represents a calibrated
rms measure of the received signal strength (RSSI). Since in
the AGC mode the output signal is forced to the 354 mV rms
set-point (
–
9.02 dBV rms), Equation 2 can be recast to
express the strength of the received signal, V
IN-RMS
, in terms
of the AGC bias V
DETO
,
V
V
IN RMS
DETO
=
+
×
(dBV rms)
54 02
.
50
(4)
where
–
54.02
dBV rms
–
45
dB
9.02
dBV rms
.
For small changes in input signal level, V
DETO
responds with a
characteristic single-pole time constant,
τ
AGC
, which is propor-
tional to C
AGC
,
τ
AGC
AGC
C
( s)
(nF)
=
×
10
(5)
where the internal 5 pF capacitor has been lumped with the
external capacitor to give C
AGC
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8367ARUZ | 功能描述:IC AMP VGA 14TSSOP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:X-AMP® 標(biāo)準(zhǔn)包裝:2,500 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:- 轉(zhuǎn)換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:45nA 電壓 - 輸入偏移:2000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:40mA 電壓 - 電源，單路/雙路(±):3 V ~ 32 V，±1.5 V ~ 16 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) 其它名稱:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| AD8367ARUZ | 制造商:Analog Devices 功能描述:PROGRAMMABLE GAIN AMPLIFIER IC ((NW)) |
| AD8367ARUZ | 制造商:Analog Devices 功能描述:IC DETECTOR |
| AD8367ARUZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:500 MHz, Linear-in-dB VGA with AGC Detector |
| AD8367ARUZ-RL7 | 功能描述:IC AMP VGA 14TSSOP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:X-AMP® 標(biāo)準(zhǔn)包裝:150 系列:- 放大器類型:音頻 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:5 V/µs 增益帶寬積:12MHz -3db帶寬:- 電流 - 輸入偏壓:100nA 電壓 - 輸入偏移:500µV 電流 - 電源:6mA 電流 - 輸出 / 通道:50mA 電壓 - 電源，單路/雙路(±):4 V ~ 32 V，±2 V ~ 16 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
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