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參數資料
| 型號： | AD8402AR50 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字電位計 |
| 英文描述： | 32-Tap. Nonvolatile. Linear-Taper Digital Potentiometers in SOT23 |
| 中文描述： | DUAL 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO14 |
| 封裝： | MS-012AB, SOIC-14 |
| 文件頁數： | 15/20頁 |
| 文件大小： | 496K |
| 代理商： | AD8402AR50 |
AD8400/AD8402/AD8403
REV. B
–15–
The ac characteristics of the RDACs are dominated by the inter-
nal parasitic capacitances and the external capacitive loads. The
–3 dB bandwidth of the AD8403AN10 (10 k
resistor) mea-
sures 600 kHz at half scale as a potentiometer divider. Figure 23
provides the large signal BODE plot characteristics of the three
available resistor versions 10 k
, 50 k
, and 100 k
. The gain
flatness versus frequency graph, Figure 26, predicts filter appli-
cations performance. A parasitic simulation model has been de-
veloped, and is shown in Figure 42. Listing I provides a macro
model net list for the 10 k
RDAC:
Listing I. Macro Model Net List for RDAC
.PARAM DW=255, RDAC=10E3
*
.SUBCKT DPOT (A,W,)
*
CA
A
0
{DW/256*90.4E-12+30E-12}
RAW
A
W
{(1-DW/256)*RDAC+50}
CW
W
0
120E-12
RBW
W
B
{DW/256*RDAC+50}
CB
B
0
{(1-DW/256)*90.4E-12+30E-12}
*
.ENDS DPOT
The total harmonic distortion plus noise (THD+N) is measured
at 0.003% in an inverting op amp circuit using an offset ground
and a rail-to-rail OP279 amplifier, Figure 33. Thermal noise is
primarily Johnson noise, typically 9 nV/
√
Hz
for the 10 k
ver-
sion at f = 1 kHz. For the 100 k
device, thermal noise becomes
29 nV/
√
Hz
. Channel-to-channel crosstalk measures less than
–65 dB at f = 100 kHz. To achieve this isolation, the extra ground
pins provided on the package to segregate the individual RDACs
must be connected to circuit ground. AGND and DGND pins
should be at the same voltage potential. Any unused potentio-
meters in a package should be connected to ground. Power sup-
ply rejection is typically –35 dB at 10 kHz (care is needed to
minimize power supply ripple in high accuracy applications).
APPLICATIONS
The digital potentiometer (RDAC) allows many of the applica-
tions of trimming potentiometers to be replaced by a solid-state
solution offering compact size, freedom from vibration, shock
and open contact problems encountered in hostile environ-
ments. A major advantage of the digital potentiometer is its
programmability. Any settings can be saved for later recall in
system memory.
The two major configurations of the RDAC include the
potentiometer divider (basic 3-terminal application) and the
rheostat (2-terminal configuration) connections shown in
Figures 29 and 30.
Certain boundary conditions must be satisfied for proper
AD8400/AD8402/AD8403 operation. First, all analog signals
must remain within the 0 to V
DD
range used to operate the
single-supply AD8400/AD8402/AD8403 products. For standard
potentiometer divider applications, the wiper output can be
used directly. For low resistance loads, buffer the wiper with a
suitable rail-to-rail op amp such as the OP291 or the OP279.
Second, for ac signals and bipolar dc adjustment applications, a
virtual ground will generally be needed. Whatever method is
used to create the virtual ground, the result must provide the
necessary sink and source current for all connected loads, in-
cluding adequate bypass capacitance. Figure 33 shows one
channel of the AD8402 connected in an inverting program-
mable gain amplifier circuit. The virtual ground is set at +2.5 V
which allows the circuit output to span a
±
2.5 volt range with
respect to virtual ground. The rail-to-rail amplifier capability is
necessary for the widest output swing. As the wiper is adjusted
from its midscale reset position (80
H
) toward the A terminal
(code FF
H
), the voltage gain of the circuit is increased in suc-
cessfully larger increments. Alternatively, as the wiper is ad-
justed toward the B terminal (code 00
H
), the signal becomes
attenuated. The plot in Figure 43 shows the wiper settings for a
100:1 range of voltage gain (V/V). Note the
±
10 dB of pseudo-
logarithmic gain around 0 dB (1 V/V). This circuit is mainly
useful for gain adjustments in the range of 0.14 V/V to 4 V/V;
beyond this range the step sizes become very large and the resis-
tance of the driving circuit can become a significant term in the
gain equation.
INVERTING GAIN – V/V
256
128
0
0.1
1.0
10
96
64
32
160
192
224
D
Figure 43. Inverting Programmable Gain Plot
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD8402AR50-REEL | 功能描述:IC POT DIG DUAL 50K 8BIT 14SOIC RoHS:否 類別:集成電路 (IC) >> 數據采集 - 數字電位器 系列:- 標準包裝:3,000 系列:DPP 接片:32 電阻（歐姆）:10k 電路數:1 溫度系數:標準值 300 ppm/°C 存儲器類型:非易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.5 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WFDFN 裸露焊盤 供應商設備封裝:8-TDFN（2x3） 包裝:帶卷 (TR) |
| AD8402ARU1 | 制造商:Analog Devices 功能描述:Digital Potentiometer 256POS 1KOhm Dual 14-Pin TSSOP |
| AD8402ARU10 | 功能描述:IC POT DIG DUAL 10K 8BIT 14TSSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 數字電位器 系列:- 標準包裝:3,000 系列:DPP 接片:32 電阻（歐姆）:10k 電路數:1 溫度系數:標準值 300 ppm/°C 存儲器類型:非易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.5 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WFDFN 裸露焊盤 供應商設備封裝:8-TDFN（2x3） 包裝:帶卷 (TR) |
| AD8402ARU100 | 功能描述:IC POT DGTL DUAL 100K 8B 14TSSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 數字電位器 系列:- 標準包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數:1 溫度系數:標準值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:14-TSSOP 包裝:帶卷 (TR) |
| AD8402ARU100-REEL | 功能描述:IC POT DIG DUAL 100K 8B 14TSSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 數字電位器 系列:- 標準包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數:1 溫度系數:標準值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:14-TSSOP 包裝:帶卷 (TR) |
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