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參數資料
| 型號： | AD841SE |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Wideband, Unity-Gain Stable, Fast Settling Op Amp |
| 中文描述： | OP-AMP, 5500 uV OFFSET-MAX, 40 MHz BAND WIDTH, CQCC20 |
| 封裝： | CERAMIC, LCC-20 |
| 文件頁數： | 6/8頁 |
| 文件大小： | 354K |
| 代理商： | AD841SE |
AD841
REV. B
–6–
INPUT CONSIDERATIONS
An input resistor (R
IN
in Figure 20) is recommended in circuits
where the input to the AD841 will be subjected to transient or
continuous overload voltages exceeding the
±
6 V maximum dif-
ferential limit. This resistor provides protection for the input
transistors by limiting the maximum current that can be forced
into the input.
For high performance circuits it is recommended that a resistor
(R
B
in Figures 19 and 20) be used to reduce bias current errors
by matching the impedance at each input. The output voltage
error caused by the offset current is more than an order of mag-
nitude less than the error present if the bias current error is not
removed.
AD841 SETTLING TIME
Figures 22 and 24 show the settling performance of the AD841
in the test circuit shown in Figure 23.
Settling time is defined as:
The interval of time from the application of an ideal step
function input until the closed-loop amplifier output has
entered and remains within a specified error band.
This definition encompasses the major components which com-
prise settling time. They include (1) propagation delay through
the amplifier; (2) slewing time to approach the final output
value; (3) the time of recovery from the overload associated with
slewing and (4) linear settling to within the specified error band.
Figure 19a. Inverting Amplifier
Configuration (DIP Pinout)
Figure 20a. Unity-Gain Buffer Amplifier
Configuration (DIP Pinout)
Figure 19b. Inverter Large Signal
Pulse Response
Figure 20b. Buffer Large Signal
Pulse Response
Figure 19c. Inverter Small Signal
Pulse Response
Figure 20c. Buffer Small Signal
Pulse Response
OFFSET NULLING
The input offset voltage of the AD841 is very low for a high
speed op amp, but if additional nulling is required, the circuit
shown in Figure 21 can be used.
Figure 21. Offset Nulling (DIP Pinout)
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| AD841SH | Wideband, Unity-Gain Stable, Fast Settling Op Amp |
| AD841SQ | Wideband, Unity-Gain Stable, Fast Settling Op Amp |
| AD841JQ | Wideband, Unity-Gain Stable, Fast Settling Op Amp |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD841SE/883B | 功能描述:高速運算放大器 FAST SETTLING H.S. OP AMP RoHS:否 制造商:Texas Instruments 通道數量:1 電壓增益 dB:116 dB 輸入補償電壓:0.5 mV 轉換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 產品: |
| AD841SEZ | 制造商:Analog Devices 功能描述:OP Amp Single GP ±18V 20-Pin LCC |
| AD841SH | 制造商:Analog Devices 功能描述:OP Amp Single GP 制造商:Rochester Electronics LLC 功能描述:FAST SETTLING H.S. OP AMP - Bulk |
| AD841SH/883B | 制造商:Analog Devices 功能描述:OP Amp Single GP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD841SHZ | 制造商:Analog Devices 功能描述:OP Amp Single GP 制造商:Analog Devices 功能描述:OP Amp Single GP ±18V 12-Pin TO-8 |
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