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參數資料
型號: AD8512ARZ-REEL7
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: AC 7C 7#16S PIN RECP
中文描述: DUAL OP-AMP, 1800 uV OFFSET-MAX, 8 MHz BAND WIDTH, PDSO8
封裝: ROHS COMPLIANT, MS-012AA, SOIC-8
文件頁數: 14/20頁
文件大小: 497K
代理商: AD8512ARZ-REEL7
AD8510/AD8512/AD8513
SETTLING TIME
Settling time is the time it takes the output of the amplifier to
reach and remain within a percentage of its final value after a
pulse has been applied at the input. The AD8510/AD8512/
AD8513 settle to within 0.01% in less than 900 ns with a step of
0 V to 10 V in unity gain. This makes the each of the parts an
excellent choice as a buffer at the output of DACs whose settling
time is typically less than 1 μs.
Rev. E | Page 14 of 20
In addition to their fast settling time and fast slew rate, the
AD8510/AD8512/AD8513’s low offset voltage drift and input
offset current maintain full accuracy of 12-bit converters over
the entire operating temperature range.
OVERLOAD RECOVERY TIME
Overload recovery, also known as overdrive recovery, is the time
it takes the output of an amplifier to recover from a saturated
condition to its linear region. This recovery time is particularly
important in applications where the amplifier must amplify
small signals in the presence of large transient voltages.
Figure 43 shows the positive overload recovery of the
AD8510/AD8512/AD8513. The output recovers in
approximately 200 ns from a saturated condition.
TIME (2
μ
s/DIV)
V
200mV
0V
0V
–15V
0
I
O
V
SY
= ±15V
V
IN
= 200mV
A
= –100
RL = 10k
Figure 43. Positive Overload Recovery
The negative overdrive recovery time shown in Figure 44 is less
than 200 ns.
In addition to the fast recovery time, the AD8510/AD8512/
AD8513 show excellent symmetry of the positive and negative
recovery times. This is an important feature for transient signal
rectification, because the output signal is kept equally undis-
torted throughout any given period.
TIME (2
μ
s/DIV)
V
–200mV
0V
0V
+15V
0
I
O
V
SY
= ±15V
A
V
= –100
R
L
= 10k
Figure 44. Negative Overload Recovery
CAPACITIVE LOAD DRIVE
The AD8510/AD8512/AD8513 are unconditionally stable at all
gains in inverting and noninverting configurations. They are
capable of driving up to 1000 pF of capacitive loads without
oscillation in unity gain, the worst-case configuration.
However, as with most amplifiers, driving larger capacitive loads
in a unity gain configuration may cause excessive overshoot and
ringing or even oscillation. A simple snubber network reduces
the amount of overshoot and ringing significantly. The advan-
tage of this configuration is that the output swing of the ampli-
fier is not reduced, because R
S
is outside the feedback loop.
7
4
6
AD8510
200mV
R
S
C
S
C
L
V
OUT
V+
V–
0
Figure 45. Snubber Network Configuration
Figure 46 shows a scope photograph of the output of the
AD8510/AD8512/AD8513 in response to a 400 mV pulse. The
circuit is configured in positive unity gain (worst-case) with a
load experience of 500 pF.
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AD8512BR-REEL7 功能描述:IC OPAMP JFET 8MHZ DUAL LN 8SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:150 系列:- 放大器類型:音頻 電路數:2 輸出類型:- 轉換速率:5 V/µs 增益帶寬積:12MHz -3db帶寬:- 電流 - 輸入偏壓:100nA 電壓 - 輸入偏移:500µV 電流 - 電源:6mA 電流 - 輸出 / 通道:50mA 電壓 - 電源,單路/雙路(±):4 V ~ 32 V,±2 V ~ 16 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP(0.173",4.40mm 寬) 供應商設備封裝:8-TSSOP 包裝:管件
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