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參數資料
| 型號： | AD8572ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers |
| 中文描述： | DUAL OP-AMP, 10 uV OFFSET-MAX, 1.5 MHz BAND WIDTH, PDSO8 |
| 封裝： | MO-153AA, TSSOP-8 |
| 文件頁數： | 17/19頁 |
| 文件大小： | 247K |
| 代理商： | AD8572ARU |
AD8571/AD8572/AD8574
–17–
REV. 0
SPICE Model
The SPICE macro-model for the AD857x amplifier is given in
Listing 1. This model simulates the typical specifications for the
AD857x, and it can be downloaded from the Analog Devices
website at
http://www.analog.com.
The schematic of the
macro-model is shown in Figure 61.
Transistors M1 through M4 simulate the rail-to-rail input differ-
ential pairs in the AD857x amplifier. The EOS voltage source in
series with the noninverting input establishes not only the 1
μ
V
offset voltage, but is also used to establish common-mode and
power supply rejection ratios and input voltage noise. The differ-
ential voltages from nodes 14 to 16 and nodes 17 to 18 are reflected
to E1, which is used to simulate a secondary pole-zero combination
in the open-loop gain of the amplifier.
The voltage at node 32 is then reflected to G1, which adds an
additional gain stage and, in conjunction with CF, establishes
the slew rate of the model at 0.5 V/
μ
s. M5 and M6 are in a
common-source configuration, similar to the output stage of
the AD857x amplifier. EG1 and EG2 fix the quiescent current
in these two transistors at 100
μ
A, and also help accurately
simulate the V
OUT
vs. I
OUT
characteristic of the amplifier.
The network around ECM1 creates the common-mode voltage
error, with CCM1 setting the corner frequency for the CMRR
roll-off. The power supply rejection error is created by the network
around EPS1, with CPS3 establishing the corner frequency for
the PSRR roll-off. The two current loops around nodes 80 and
81 are used to create a 51 nV/
√
Hz
noise figure across RN2. All
three of these error sources are reflected to the input of the op
amp model through EOS. Finally, GSY is used to accurately
model the supply current versus supply voltage increase in
the AD857x.
This macro-model has been designed to accurately simulate a
number of specifications exhibited by the AD857x amplifier,
and is one of the most true-to-life macro-models available for
any op amp. It is optimized for operation at 27
°
C. Although the
model will function at different temperatures, it may lose accuracy
with respect to the actual behavior of the AD857x.
17
18
99
11
12
C2
R
C7
R
C8
R
C3
R
C4
D2
I2
V1
10
50
99
+
EOS
8
9
I1
D1
V1
2
R
C2
R
C1
C1
R
C6
R
C5
50
16
M2
M1
1
14
7
M3
M4
13
31
+
C2
R
2
32
R
3
2
E1
+
EREF
0
98
2
21
CCM1
R
CM1
22
R
CM2
ECM1
98
+
2
81
80
+
2
HN
R
N2
R
N1
VN1
98
72
CPS3
R
PS3
73
R
PS4
EPS1
98
+
2
99
CPS1
70
R
PS1
0
R
PS2
CPS2
50
71
99
50
GSY
M5
99
EG1
CF
+
D3
97
D4
+
2
EVP
EVN
98
51
M6
R
1
98
G1
+
2
EG2
50
47
30
45
98
2
2
+
46
Figure 61. Schematic of the AD857x SPICE Macro-Model
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| AD8572ARU-REEL | 制造商:Analog Devices 功能描述:SP Amp Chopper Stabilization Dual R-R I/O 5V 8-Pin TSSOP T/R |
| AD8572ARUZ | 功能描述:IC OPAMP CHOPPER R-R DUAL 8TSSOP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:2,500 系列:- 放大器類型:通用 電路數:4 輸出類型:- 轉換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:45nA 電壓 - 輸入偏移:2000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:40mA 電壓 - 電源，單路/雙路(±):3 V ~ 32 V，±1.5 V ~ 16 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:14-TSSOP 包裝:帶卷 (TR) 其它名稱:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| AD8572ARUZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Zero-Drift, Single-Supply, Rail-to-Rail Input/Output Operational Amplifiers |
| AD8572ARUZ-REEL | 功能描述:IC OPAMP CHOPPER R-R DUAL 8TSSOP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:50 系列:- 放大器類型:通用 電路數:2 輸出類型:滿擺幅 轉換速率:1.8 V/µs 增益帶寬積:6.5MHz -3db帶寬:4.5MHz 電流 - 輸入偏壓:5nA 電壓 - 輸入偏移:100µV 電流 - 電源:65µA 電流 - 輸出 / 通道:35mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 5.25 V，±0.9 V ~ 2.625 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:10-MSOP 包裝:管件 |
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