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參數資料
型號: AD9203ARU
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 10-Bit, 40 MSPS, 3 V, 74 mW A/D Converter
中文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: MO-153AE, TSSOP-28
文件頁數: 1/19頁
文件大?。?/td> 216K
代理商: AD9203ARU
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD9203
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
10-Bit, 40 MSPS, 3 V, 74 mW
A/D Converter
FEATURES
CMOS 10-Bit 40 MSPS Sampling A/D Converter
Power Dissipation: 74 mW (3 V Supply, 40 MSPS)
17 mW (3 V Supply, 5 MSPS)
Operation Between 2.7 V and 3.6 V Supply
Differential Nonlinearity:
6
0.25 LSB
Power-Down (Standby) Mode, 0.65 mW
ENOB: 9.55 @ f
IN
= 20 MHz
Out-of-Range Indicator
Adjustable On-Chip Voltage Reference
IF Undersampling up to f
IN
= 130 MHz
Input Range: 1 V to 2 V p-p Differential or Single-Ended
Adjustable Power Consumption
Internal Clamp Circuit
APPLICATIONS
CCD Imaging
Video
Portable Instrumentation
IF and Baseband Communications
Cable Modems
Medical Ultrasound
PRODUCT DESCRIPTION
The AD9203 is a monolithic low power, single supply, 10-bit,
40 MSPS analog-to-digital converter, with an on-chip voltage
reference. The AD9203 uses a multistage differential pipeline
architecture and guarantees no missing codes over the full oper-
ating temperature range. Its input range may be adjusted be-
tween 1 V and 2 V p-p.
The AD9203 has an onboard programmable reference. An
external reference can also be chosen to suit the dc accuracy and
temperature drift requirements of an application.
An external resistor can be used to reduce power consumption
when operating at lower sampling rates. This yields power sav-
ings for users who do not require the maximum sample rate.
This feature is especially useful at sample rates far below 40
MSPS. Excellent performance is still achieved at reduced power.
For example, 9.7 ENOB performance may be realized with only
17 mW of power, using a 5 MHz clock.
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary or
twos complementary output format by using the DFS pin. An
out-of-range signal (OTR) indicates an overflow condition that
can be used with the most significant bit to determine over or
under range.
The AD9203 can operate with a supply range from 2.7 V to
3.6 V, attractive for low power operation in high speed por-
table applications.
The AD9203 is specified over industrial (–40
°
C to +85
°
C)
temperature ranges and is available in a 28-lead TSSOP
package.
PRODUCT HIGHLIGHTS
Low Power
The AD9203 consumes 74 mW on a 3 V supply operating at
40 MSPS. In standby mode, power is reduced to 0.65 mW.
High Performance
Maintains better than 9.55 ENOB at 40 MSPS input signal
from dc to Nyquist.
Very Small Package
The AD9203 is available in a 28-lead TSSOP.
Programmable Power
The AD9203 power can be further reduced by using an external
resistor at lower sample rates.
Built-In Clamp Function
Allows dc restoration of video signals.
FUNCTIONAL BLOCK DIAGRAM
SHA
GAIN
A/D
D/A
SHA
GAIN
A/D
D/A
A/D
CORRECTION LOGIC
AD9203
OUTPUT BUFFERS
10
+
0.5V
BANDGAP
CLK
AVDD
DRVDD
STBY
3 STATE
OTR
D9 (MSB)
D0 (LSB)
DRVSS
DFS
PWRCON
AVSS
CLAMP
CLAMPIN
AINP
AINN
REFTF
REFBF
VREF
REFSENSE
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