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參數資料
| 型號： | AD9212BCPZ-40 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| 中文描述： | 8-CH 10-BIT FLASH METHOD ADC, SERIAL ACCESS, QCC64 |
| 封裝： | 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD-4, LFCSP-64 |
| 文件頁數： | 32/56頁 |
| 文件大小： | 1840K |
| 代理商： | AD9212BCPZ-40 |
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AD9212
MEMORY MAP
READING THE MEMORY MAP TABLE
Each row in the memory map table has eight address locations.
The memory map is roughly divided into three sections: chip
configuration register map (Address 0x00 to Address 0x02), device
index and transfer register map (Address 0x05 and Address 0xFF),
and program register map (Address 0x08 to Address 0x25).
The left-hand column of the memory map indicates the register
address number in hexadecimal. The default value of this address is
shown in hexadecimal in the right-hand column. The Bit 7 (MSB)
column is the start of the default hexadecimal value given. For
example, Hexadecimal Address 0x09, Clock, has a hexadecimal
default value of 0x01. This means Bit 7 = 0, Bit 6 = 0, Bit 5 = 0,
Bit 4 = 0, Bit 3 = 0, Bit 2 = 0, Bit 1 = 0, and Bit 0 = 1, or 0000 0001
in binary. This setting is the default for the duty cycle stabilizer in
the on condition. By writing a 0 to Bit 6 at this address, the duty
cycle stabilizer turns off. For more information on this and other
functions, consult the user manual
Interfacing to High Speed
ADCs via SPI
.
Rev. 0 | Page 32 of 56
RESERVED LOCATIONS
Undefined memory locations should not be written to except
when writing the default values suggested in this data sheet.
Addresses that have values marked as 0 should be considered
reserved and have a 0 written into their registers during power-up.
DEFAULT VALUES
Coming out of reset, critical registers are preloaded with default
values. These values are indicated in Table 15, where an X refers
to an undefined feature.
LOGIC LEVELS
An explanation of various registers follows: “Bit is set” is
synonymous with “bit is set to Logic 1” or “writing Logic 1 for
the bit.” Similarly, “clear a bit” is synonymous with “bit is set to
Logic 0” or “writing Logic 0 for the bit.”
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PDF描述 |
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| AD9212BCPZ-65 | Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9212BCPZRL7-40 | Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9212BCPZRL7-65 | Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9214 | 10-Bit, 65/80/105 MSPS 3 V A/D Converter |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9212BCPZ-65 | 制造商:Analog Devices 功能描述:ADC Octal Pipelined 65Msps 10-bit Serial 64-Pin LFCSP EP |
| AD9212BCPZRL7-40 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9212BCPZRL7-65 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9214 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 65/80/105 MSPS 3 V A/D Converter |
| AD9214-105PCB | 制造商:Analog Devices 功能描述:10 BIT 105MSPS A/D CONV. EVAL BOARD - Bulk |
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