- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373960 > AD9216BCPZRL7-65 (ANALOG DEVICES INC) 10-Bit, 65/80/105 MSPS Dual A/D Converter PDF資料下載
參數(shù)資料
| 型號： | AD9216BCPZRL7-65 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 10-Bit, 65/80/105 MSPS Dual A/D Converter |
| 中文描述： | 2-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC64 |
| 封裝： | 9 X 9 MM, LEAD FREE, MO-220-VMMD, LFCSP-64 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 298K |
| 代理商： | AD9216BCPZRL7-65 |
Preliminary Technical Data
AD9216
Table 7. Pin Function Descriptions
Pin
Number
2
VIN+_A
3
VIN–_A
15
VIN+_B
14
VIN- _B
6
REFT_A
7
REFB_A
11
REFT_B
10
REFB_B
8
VREF
9
SENSE
18
CLK_B
63
CLK_A
19
DCS
20
DFS
21
PDWN_B
60
PDWN_A
22
OEB_B
59
OEB_A
46–51, 54-
57
(MSB)
27, 30-38
D0_B (LSB) –D9_B
(MSB)
39
OTR_B
58
OTR_A
62
SHARED_REF
Rev. PrD
Page 9 of 20
6/15/2004
Mnemonic
Description
Analog Input Pin (+) for Channel A
Analog Input Pin (- ) for Channel A
Analog Input Pin (+) for Channel B
Analog Input Pin (- ) for Channel B
Differential Reference (+) for Channel A
Differential Reference (- ) for Channel A
Differential Reference (+) for Channel B
Differential Reference (- ) for Channel B
Voltage Reference Input/Output
Reference Mode Selection
Clock Input Pin for Channel B
Clock Input Pin for Channel A
Enable Duty Cycle Stabilizer (DCS) Mode ( Tie to AVDD to enable)
Data Output Format Select Bit (Low for Offset Binary, High for Twos Complement)
Power-Down Function Selection for Channel B (Active High)
Power-Down Function Selection for Channel A (Active High)
Output Enable Bit for Channel B (Low Setting Enables Channel B Output Data Bus)
Output Enable Bit for Channel A (Low Setting Enables Channel A Output Data Bus)
Channel A Data Output Bits
D0_A (LSB)-D9_A
Channel B Data Output Bits
Out-of-Range Indicator for Channel B
Out-of-Range Indicator for Channel A
Shared Reference Control Bit (Low for Independent Reference Mode, High for Shared
Reference Mode)
Data Multiplexed Mode. (See description for how to enable; high setting disables output data
Multiplexed mode)
Analog Power Supply
61
MUX_SELECT
5, 12, 17,
64
1, 4, 13, 16
28, 40, 53
29, 41, 52
AVDD
AGND
DRGND
DRVDD
Analog Ground
Digital Output Ground
Digital Output Driver Supply. Must be decoupled to DRGND with a minimum 0.1 μF capacitor.
Recommended decoupling is 0.1 μF capacitor in parallel with 10 μF
Do Not Connect Pins. Should be left floating.
23-26, 42-
45
DNC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9216 | Static Monitor |
| AD9216-105 | 10-Bit, 65/80/105 MSPS Dual A/D Converter |
| AD9216-105PCB | 10-Bit, 65/80/105 MSPS Dual A/D Converter |
| AD9216-40PCB | 10-Bit, 65/80/105 MSPS Dual A/D Converter |
| AD9216-65 | 10-Bit, 65/80/105 MSPS Dual A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9216BCPZRL7-80 | 功能描述:IC ADC 10BIT DUAL 80MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD9218 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 40/65/80/105 MSPS 3 V Dual A/D Converter |
| AD9218_06 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 40/65/80/105 MSPS 3 V Dual Analog-to-Digital Converter |
| AD9218-105PCB | 制造商:Analog Devices 功能描述:DUAL 10 BIT 105/80/65 MSPS ADC EVAL BD. - Bulk |
| AD9218-65PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 40/65/80/105 MSPS 3 V Dual A/D Converter |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。