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參數資料
| 型號： | AD9233BCPZRL7-125 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 1/44頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 125MSPS 48-LFCSP |
| 標準包裝： | 750 |
| 位數： | 12 |
| 采樣率（每秒）： | 125M |
| 數據接口： | 串行，SPI? |
| 轉換器數目： | 1 |
| 功率耗散（最大）： | 425mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數目和類型： | 2 個單端，單極；1 個差分，單極 |
| 配用： | AD9233-125EBZ-ND - BOARD EVALUATION FOR AD9233 |
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12-Bit, 80 MSPS/105 MSPS/125 MSPS,
1.8 V Analog-to-Digital Converter
AD9233
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
1.8 V analog supply operation
1.8 V to 3.3 V output supply
SNR = 69.5 dBc (70.5 dBFS) to 70 MHz input
SFDR = 85 dBc to 70 MHz input
Low power: 395 mW @ 125 MSPS
Differential input with 650 MHz bandwidth
On-chip voltage reference and sample-and-hold amplifier
DNL = ±0.15 LSB
Flexible analog input: 1 V p-p to 2 V p-p range
Offset binary, Gray code, or twos complement data format
Clock duty cycle stabilizer
Data output clock
Serial port control
Built-in selectable digital test pattern generation
Programmable clock and data alignment
APPLICATIONS
Ultrasound equipment
IF sampling in communications receivers
IS-95, CDMA-One, IMT-2000
Battery-powered instruments
Hand-held scopemeters
Low cost digital oscilloscopes
GENERAL DESCRIPTION
The AD9233 is a monolithic, single 1.8 V supply, 12-bit, 80 MSPS/
105 MSPS/125 MSPS analog-to-digital converter (ADC), featuring
a high performance sample-and-hold amplifier (SHA) and on-
chip voltage reference. The product uses a multistage differential
pipeline architecture with output error correction logic to
provide 12-bit accuracy at 125 MSPS data rates and guarantees
no missing codes over the full operating temperature range.
The wide bandwidth, truly differential SHA allows a variety of
user-selectable input ranges and offsets, including single-ended
applications. It is suitable for multiplexed systems that switch
full-scale voltage levels in successive channels and for sampling
single-channel inputs at frequencies well beyond the Nyquist rate.
Combined with power and cost savings over previously available
ADCs, the AD9233 is suitable for applications in communications,
imaging, and medical ultrasound.
A differential clock input controls all internal conversion cycles. A
duty cycle stabilizer (DCS) compensates for wide variations in the
clock duty cycle while maintaining excellent overall ADC
performance.
FUNCTIONAL BLOCK DIAGRAM
DRVDD
AVDD
AGND
0.5V
CLK–
PDWN DRGND
OR
VIN+
VIN–
REFT
REFB
AD9233
VREF
SENSE
SHA
A/D
MDAC1
4
8
13
3
A/D
8-STAGE
1 1/2-BIT PIPELINE
REF
SELECT
CLK+
CLOCK
DUTY CYCLE
STABILIZER
MODE
SELECT
CORRECTION LOGIC
OUTPUT BUFFERS
DCO
SCLK/DFS
SDIO/DCS
CSB
D11 (MSB)
D0 (LSB)
05492-
001
Figure 1.
The digital output data is presented in offset binary, Gray code, or
twos complement formats. A data output clock (DCO) is provided
to ensure proper latch timing with receiving logic.
The AD9233 is available in a 48-lead LFCSP and is specified
over the industrial temperature range (40°C to +85°C).
PRODUCT HIGHLIGHTS
1.
The AD9233 operates from a single 1.8 V power supply
and features a separate digital output driver supply to
accommodate 1.8 V to 3.3 V logic families.
2.
The patented SHA input maintains excellent performance
for input frequencies up to 225 MHz.
3.
The clock DCS maintains overall ADC performance over a
wide range of clock pulse widths.
4.
A standard serial port interface supports various product
features and functions, such as data formatting (offset
binary, twos complement, or Gray coding), enabling the
clock DCS, power-down, and voltage reference mode.
5.
The AD9233 is pin compatible with the AD9246, allowing
a simple migration from 12 bits to 14 bits.
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相關代理商/技術參數 |
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| AD9233BCPZRL7-80 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter |
| AD9234-1000EBZ | 功能描述:AD9234 - 12 Bit 1G Samples per Second Analog to Digital Converter (ADC) Evaluation Board 制造商:analog devices inc. 系列:- 零件狀態:有效 A/D 轉換器數:2 位數:12 采樣率（每秒）:1G 數據接口:JESD204B 輸入范圍:1.34 Vpp 不同條件下的功率（典型值）:3W @ 1GSPS 使用的 IC/零件:AD9234 所含物品:板 標準包裝:1 |
| AD9234BCPZ-1000 | 功能描述:IC ADC 12BIT 1GSPS 64LFCSP 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態:在售 位數:12 采樣率（每秒）:1G 輸入數:2 輸入類型:差分 數據接口:JESD204B 配置:S/H-ADC 無線電 - S/H:ADC:1:1 A/D 轉換器數:1 架構:管線 參考類型:內部 電壓 - 電源，模擬:1.22 V ~ 1.28 V，2.44 V ~ 2.56 V 電壓 - 電源，數字:1.22 V ~ 1.28 V 特性:- 工作溫度:-40°C ~ 85°C 封裝/外殼:64-WFQFN 裸露焊盤 供應商器件封裝:64-LFCSP-WQ（9x9） 標準包裝:1 |
| AD9234BCPZRL7-1000 | 功能描述:IC ADC 12BIT 1GSPS 64LFCSP 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態:在售 位數:12 采樣率（每秒）:1G 輸入數:2 輸入類型:差分 數據接口:JESD204B 配置:S/H-ADC 無線電 - S/H:ADC:1:1 A/D 轉換器數:1 架構:管線 參考類型:內部 電壓 - 電源，模擬:1.22 V ~ 1.28 V，2.44 V ~ 2.56 V 電壓 - 電源，數字:1.22 V ~ 1.28 V 特性:- 工作溫度:-40°C ~ 85°C 封裝/外殼:64-VFQFN 裸露焊盤，CSP 供應商器件封裝:64-LFCSP-VQ（9x9） 標準包裝:750 |
| AD9234-EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Speed ADC USB FIFO Evaluation Kit |
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