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參數(shù)資料
型號(hào)： AD9259ABCPZRL7-50
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/52頁(yè)
文件大小： 0K
描述： IC ADC 14BIT SRL 50MSPS 48LFCSP
標(biāo)準(zhǔn)包裝： 750
位數(shù)： 14
采樣率（每秒）： 50M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
功率耗散（最大）： 409mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 48-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 48-LFCSP-VQ（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 8 個(gè)單端，單極；4 個(gè)差分，單極
Quad, 14-Bit, 50 MSPS
Serial LVDS 1.8 V ADC
Data Sheet
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2006–2011 Analog Devices, Inc. All rights reserved.
FEATURES
4 ADCs integrated into 1 package
98 mW ADC power per channel at 50 MSPS
SNR = 73 dB (to Nyquist)
ENOB = 12 bits
SFDR = 84 dBc (to Nyquist)
Excellent linearity
DNL = ±0.5 LSB (typical)
INL = ±1.5 LSB (typical)
Serial LVDS (ANSI-644, default)
Low power, reduced signal option (similar to IEEE 1596.3)
Data and frame clock outputs
315 MHz full-power analog bandwidth
2 V p-p input voltage range
1.8 V supply operation
Serial port control
Full-chip and individual-channel power-down modes
Flexible bit orientation
Built-in and custom digital test pattern generation
Programmable clock and data alignment
Programmable output resolution
Standby mode
APPLICATIONS
Medical imaging and nondestructive ultrasound
Portable ultrasound and digital beam-forming systems
Quadrature radio receivers
Diversity radio receivers
Tape drives
Optical networking
Test equipment
GENERAL DESCRIPTION
The AD9259 is a quad, 14-bit, 50 MSPS analog-to-digital con-
verter (ADC) with an on-chip sample-and-hold circuit designed
for low cost, low power, small size, and ease of use. The product
operates at a conversion rate of up to 50 MSPS and is optimized for
outstanding dynamic performance and low power in applications
where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/
CMOS-/LVDS-compatible sample rate clock for full performance
operation. No external reference or driver components are
required for many applications.
FUNCTIONAL BLOCK DIAGRAM
SERIAL
LVDS
REF
SELECT
+–
AD9259
AGND
VIN – A
VIN + A
VIN – B
VIN + B
VIN – D
VIN + D
VIN – C
VIN + C
SENSE
VREF
AVDD
DRVDD
14
PDWN
REFT
REFB
D – A
D + A
D – B
D + B
D – D
D + D
D – C
D + C
FCO–
FCO+
DCO+
DCO–
CLK+
DRGND
CLK–
SERIAL PORT
INTERFACE
CSB
SCLK/DTP
SDIO/ODM
RBIAS
SERIAL
LVDS
SERIAL
LVDS
SERIAL
LVDS
PIPELINE
ADC
PIPELINE
ADC
PIPELINE
ADC
PIPELINE
ADC
DATA RATE
MULTIPLIER
0.5V
059
65-
00
1
T/H
Figure 1.
The ADC automatically multiplies the sample rate clock for the
appropriate LVDS serial data rate. A data clock output (DCO) for
capturing data on the output and a frame clock output (FCO)
for signaling a new output byte are provided. Individual-channel
power-down is supported and typically consumes less than 2 mW
when all channels are disabled.
The ADC contains several features designed to maximize
flexibility and minimize system cost, such as programmable
clock and data alignment and programmable digital test pattern
generation. The available digital test patterns include built-in
deterministic and pseudorandom patterns, along with custom user-
defined test patterns entered via the serial port interface (SPI).
The AD9259 is available in a RoHS-compliant, 48-lead LFCSP. It is
specified over the industrial temperature range of 40°C to +85°C.
PRODUCT HIGHLIGHTS
1.
Small Footprint. Four ADCs are contained in a small, space-
saving package.
2.
Low power of 98 mW/channel at 50 MSPS.
3.
Ease of Use. A data clock output (DCO) operates at
frequencies of up to 350 MHz and supports double data
rate (DDR) operation.
4.
User Flexibility. The SPI control offers a wide range of flexible
features to meet specific system requirements.
5.
Pin-Compatible Family. This includes the AD9287 (8-bit),
AD9219 (10-bit), and AD9228 (12-bit).
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9259BCPZ-50 制造商:Analog Devices 功能描述:ADC Quad Pipelined 50Msps 14-bit Serial (2-Wire)/LVDS 48-Pin LFCSP EP 制造商:Analog Devices 功能描述:14BIT 50 MSPS SERIAL LVDS ADC 制造商:Analog Devices 功能描述:14BIT ADC 50MSPS SMD LFCSP-48
AD9259BCPZRL-50 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Quad, 14-bit, 50 MSPS Serial LVDS 1.8 V A/D Converter
AD9260 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:High-Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate
AD9260AS 制造商:Analog Devices 功能描述:ADC Single Pipelined 2.5Msps 16-bit Parallel 44-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:16-BIT HIGH SPEED OVERSAMPLED ADC - Bulk 制造商:Analog Devices 功能描述:Analog-Digital Converter IC Number of Bi
AD9260ASRL 制造商:Analog Devices 功能描述:ADC Single Pipelined 2.5Msps 16-bit Parallel 44-Pin MQFP T/R 制造商:Rochester Electronics LLC 功能描述:16-BIT HIGH SPEED OVERSAMPLED ADC - Bulk
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