- 您現在的位置：買賣IC網 > PDF目錄373962 > AD9281 (Analog Devices, Inc.) Dual Channel 8-Bit Resolution CMOS ADC PDF資料下載
參數資料
| 型號： | AD9281 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual Channel 8-Bit Resolution CMOS ADC |
| 中文描述： | 雙通道8位分辨率的CMOS模數轉換器 |
| 文件頁數： | 13/19頁 |
| 文件大小： | 406K |
| 代理商： | AD9281 |
AD9281
–13–
REV. E
ANALOG
CIRCUITS
DIGITAL
LOGIC
ICs
D
V
A
A
D
DVSS
AVSS
A
B
I
A
I
D
AVDD
DVDD
LOGIC
SUPPLY
D
A
V
IN
C
STRAY
C
STRAY
GND
A
= ANALOG
D
= DIGITAL
ADC
IC
DIGITAL
CIRCUITS
A
A
Figure 31. Ground and Power Consideration
These characteristics result in both a reduction of electro-
magnetic interference (EMI) and an overall improvement in
performance.
It is important to design a layout that prevents noise from cou-
pling onto the input signal. Digital signals should not be run in
parallel with the input signal traces and should be routed
away from the input circuitry. Separate analog and digital
grounds should be joined together directly under the AD9281 in
a solid ground plane. The power and ground return currents
must be carefully managed. A general rule of thumb for mixed
signal layouts dictates that the return currents from digital cir-
cuitry should not pass through critical analog circuitry.
Transients between AVSS and DVSS will seriously degrade
performance of the ADC.
If the user cannot tie analog ground and digital ground together
at the ADC, he should consider the configuration in Figure 32.
Another input and ground technique is shown in Figure 32. A
separate ground plane has been split for RF or hard to manage
signals. These signals can be routed to the ADC differentially or
single ended (i.e., both can either be connected to the driver or
RF ground). The ADC will perform well with several hundred
mV of noise or signals between the RF and ADC analog ground.
DATA
ANALOG
GROUND
DIGITAL
GROUND
LOGIC
ADC
AIN
BIN
RF
GROUND
Figure 32. RF Ground Scheme
At the receiver, the demodulation of a QAM signal back into its
separate I and Q components is essentially the modulation
process explain above but in the reverse order. A common and
traditional implementation of a QAM demodulator is shown in
Figure 30. In this example, the demodulation is performed in
the analog domain using a dual, matched ADC and a quadra-
ture demodulator to recover and digitize the I and Q baseband
signals. The quadrature demodulator is typically a single IC
containing two mixers and the appropriate circuitry to generate
the necessary 90
°
phase shift between the I and Q mixers’ local
oscillators. Before being digitized by the ADCs, the mixed
down baseband I and Q signals are filtered using matched ana-
log filters. These filters, often referred to as Nyquist or Pulse-
Shaping filters, remove images-from the mixing process and any
out-of-band. The characteristics of the matching Nyquist filters
are well defined to provide optimum signal-to-noise (SNR)
performance while minimizing intersymbol interference. The
ADC’s are typically simultaneously sampling their respective
inputs at the QAM symbol rate or, most often, at a multiple of it
if a digital filter follows the ADC. Oversampling and the use of
digital filtering eases the implementation and complexity of the
analog filter. It also allows for enhanced digital processing for
both carrier and symbol recovery and tuning purposes. The use
of a dual ADC such as the AD9281 ensures excellent gain,
offset, and phase matching between the I and Q channels.
90°C
FROM
PREVIOUS
STAGE
QUADRATURE
DEMODULATOR
LO
I
ADC
DSP
OR
ASIC
CARRIER
FREQUENCY
NYQUIST
FILTERS
Q
ADC
DUAL MATCHED
ADC
Figure 30. Typical Analog QAM Demodulator
GROUNDING AND LAYOUT RULES
As is the case for any high performance device, proper ground-
ing and layout techniques are essential in achieving optimal
performance. The analog and digital grounds on the AD9281
have been separated to optimize the management of return
currents in a system. Grounds should be connected near the
ADC. It is recommended that a printed circuit board (PCB) of
at least four layers, employing a ground plane and power planes,
be used with the AD9281. The use of ground and power planes
offers distinct advantages:
1. The minimization of the loop area encompassed by a signal
and its return path.
2. The minimization of the impedance associated with ground
and power paths.
3. The inherent distributed capacitor formed by the power plane,
PCB insulation and ground plane.
相關PDF資料 |
PDF描述 |
|---|---|
| AD9281-EB | Dual Channel 8-Bit Resolution CMOS ADC |
| AD9281ARS | Dual Channel 8-Bit Resolution CMOS ADC |
| AD9283 | 8-Bit, 50 MSPS/80 MSPS/100 MSPS 3 V A/D Converter |
| AD9283BRS-100 | 8-Bit, 50 MSPS/80 MSPS/100 MSPS 3 V A/D Converter |
| AD9283BRS-50 | 8-Bit, 50 MSPS/80 MSPS/100 MSPS 3 V A/D Converter |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9281ARS | 功能描述:IC ADC 8BIT DUAL CMOS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:16 采樣率（每秒）:45k 數據接口:串行 轉換器數目:2 功率耗散（最大）:315mW 電壓電源:模擬和數字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數目和類型:2 個單端，單極 |
| AD9281ARSRL | 功能描述:IC ADC 8BIT DUAL CMOS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:16 采樣率（每秒）:45k 數據接口:串行 轉換器數目:2 功率耗散（最大）:315mW 電壓電源:模擬和數字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數目和類型:2 個單端，單極 |
| AD9281ARSZ | 功能描述:IC ADC 8BIT DUAL CMOS 28-SSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD9281ARSZ | 制造商:Analog Devices 功能描述:IC 8BIT ADC SMD 9281 SOIC28 |
| AD9281ARSZRL | 功能描述:IC ADC 8BIT DUAL CMOS 28SSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:16 采樣率（每秒）:45k 數據接口:串行 轉換器數目:2 功率耗散（最大）:315mW 電壓電源:模擬和數字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數目和類型:2 個單端，單極 |
發布緊急采購，3分鐘左右您將得到回復。