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參數資料
型號: AD9393BBCZRL-80
廠商: Analog Devices Inc
文件頁數: 1/40頁
文件大小: 0K
描述: IC INTERFACE 80MHZ HDMI 76CSPBGA
標準包裝: 2,500
應用: HDMI,DVI,接收器
接口: 模擬,DVI
電源電壓: 3.15 V ~ 3.47 V
封裝/外殼: 76-LFBGA,CSPBGA
供應商設備封裝: 76-CSPBGA(6x6)
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
Low Power HDMI Display Interface
AD9393
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2009 Analog Devices, Inc. All rights reserved.
FEATURES
HDMI interface
Supports high bandwidth digital content protection
RGB to YCrCb 2-way color conversion
1.8 V/3.3 V power supply
76-ball BGA package
RGB and YCrCb output formats
Digital video interface
HDMI 1.2a, DVI 1.0
80 MHz HDMI receiver
Supports high bandwidth digital content protection
(HDCP 1.1)
Digital audio interface
HDMI 1.2a-compatible audio interface
S/PDIF (IEC60958-compatible) digital audio output
Multichannel I2S audio output (up to 8 channels)
APPLICATIONS
Portable low power TV
HDTV
Projectors
LCD monitor
FUNCTIONAL BLOCK DIAGRAM
08
04
3-
00
1
DATACK
DE
VSYNC
HDMI
RECEIVER
SPDIF
8-CHANNEL
I2S
SCLK
LRCLK
HDCP
HSOUT
D[23:0]
VSOUT
DE
CO
L
O
RS
P
A
CE
CO
NV
E
RT
E
R
R/G/B 8 × 3
OR YCrCb
AD9393
SCL
SDA
Rx1+
Rx1–
Rx2+
Rx2–
RxC+
RxC–
RTERM
MCL
MDA
DDC_SCL
DDC_SDA
Rx0+
Rx0–
HSYNC
DCLK
Y
C
rC
b
R
G
B
SERIAL
REGISTER
AND
POWER
MANAGEMENT
MCLK
Figure 1.
GENERAL DESCRIPTION
The AD9393 offers a High-Definition Multimedia Interface
(HDMI) receiver integrated on a single chip. Support is also
included for high bandwidth digital content protection (HDCP).
The AD9393 contains a HDMI 1.2a-compatible receiver and
supports HDTV formats (up to 720p or 1080i) and displays
resolutions up to XGA (1024 × 768 @ 75 Hz). The receiver
features an intrapair skew tolerance of up to one full clock
cycle. With the inclusion of HDCP, displays may now receive
encrypted video content. The AD9393 allows for authentication
of a video receiver, decryption of encoded data at the receiver,
and renewability of that authentication during transmission as
specified by the HDCP 1.1 protocol.
Fabricated in an advanced CMOS process, the AD9393 is
provided in a space-saving 76-ball, surface-mount, Pb-free,
ball grid array (BGA) and is specified over the 10°C to
+80°C temperature range.
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