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參數資料
型號: AD9410
廠商: Analog Devices, Inc.
英文描述: 10-Bit, 210 MSPS A/D Converter
中文描述: 10位,210 MSPS的A / D轉換
文件頁數: 2/20頁
文件大小: 315K
代理商: AD9410
REV. 0
–2–
AD9410–SPECIFICATIONS
DC SPECIFICATIONS
Test
Level
Parameter
Temp
Min
Typ
Max
Unit
RESOLUTION
10
Bits
DC ACCURACY
No Missing Codes
1
Differential Nonlinearity
Full
25
°
C
Full
25
°
C
Full
25
°
C
Full
IV
I
VI
I
VI
I
V
Guaranteed
±
0.5
–1.0
–1.0
–2.5
–3.0
–6.0
+1.25
+1.5
+2.5
+3.0
+6.0
LSB
LSB
LSB
LSB
% FS
ppm/
°
C
Integral Nonlinearity
±
1.65
Gain Error
Gain Tempco
0
130
ANALOG INPUT
Input Voltage Range (With Respect to
A
IN
)
Common-Mode Voltage
Input Offset Voltage
Full
Full
25
°
C
Full
Full
Full
Full
25
°
C
25
°
C
V
V
I
VI
VI
V
VI
V
V
±
768
3.0
+3
mV p-p
V
mV
mV
V
ppm/
°
C
pF
MHz
–15
–20
2.4
+15
+20
2.6
Reference Voltage
Reference Tempco
Input Resistance
Input Capacitance
Analog Bandwidth, Full Power
2.5
50
875
3
500
610
1250
POWER SUPPLY
Power Dissipation AC
2
Power Dissipation DC
3
I
VCC3
I
VD3
Power Supply Rejection Ratio PSRR
25
°
C
Full
Full
Full
25
°
C
V
VI
VI
VI
I
2.1
2.0
128
401
+0.5
W
W
mA
mA
mV/V
2.4
145
480
+7.5
–7.5
NOTES
1
Package heat slug should be attached when operating at greater than 70
°
C ambient temperature.
2
Encode = 210 MSPS, A
IN
= –0.5 dBFS 10 MHz sine wave, I
VDD
= 31 mA typical at C
LOAD
= 5 pF.
3
Encode = 210 MSPS, A
IN
= dc, outputs not switching.
Specifications subject to change without notice.
SWITCHING SPECIFICATIONS
Test
Level
Parameter
Temp
Min
Typ
Max
Unit
SWITCHING PERFORMANCE
Maximum Conversion Rate
Minimum Conversion Rate
Encode Pulsewidth High (t
EH
)
Encode Pulsewidth Low (t
EL
)
Aperture Delay (t
A
)
Aperture Uncertainty (Jitter)
Output Valid Time (t
V
)
Output Propagation Delay (t
PD
)
Output Rise Time (t
R
)
Output Fall Time (t
F
)
CLKOUT Propagation Delay
1
(t
CPD
)
Data to DCO Skew (t
PD
–t
CPD
)
DS Setup Time (t
SDS
)
DS Hold Time (t
HDS
)
Interleaved Mode (A, B Latency)
Parallel Mode (A, B Latency)
Full
Full
25
°
C
25
°
C
25
°
C
25
°
C
Full
Full
25
°
C
25
°
C
Full
Full
Full
Full
Full
Full
VI
IV
IV
IV
V
V
VI
VI
V
V
VI
IV
IV
IV
VI
VI
210
MSPS
MSPS
ns
ns
ns
ps rms
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Cycles
100
1.2
1.2
2.4
2.4
1.0
0.65
3.0
7.4
1.8
1.4
4.8
1
2.6
0
0.5
0
6.4
2
A = 6, B = 6
A = 7, B = 6
NOTES
1
C
LOAD
= 5 pF.
Specifications subject to change without notice.
(V
DD
= 3.3 V, V
D
= 3.3 V, V
CC
= 5.0 V; 2.5 V external reference; A
IN
= –0.5 dBFS; Clock
input = 210 MSPS; T
A
= 25 C; unless otherwise noted.)
(V
DD
= 3.3 V, V
D
= 3.3 V, V
CC
= 5.0 V; 2.5 V external reference; A
IN
= –0.5 dBFS; Clock input = 210 MSPS;
T
A
= 25 C; unless otherwise noted.)
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