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參數資料
型號: AD9480BSUZ-2501
廠商: Analog Devices, Inc.
元件分類: ADC
英文描述: 8-Bit, 250 MSPS 3.3 V A/D Converter
中文描述: 8位,250MSPS的3V A/D轉換器
文件頁數: 1/28頁
文件大小: 1146K
代理商: AD9480BSUZ-2501
8-Bit, 250 MSPS
3.3 V A/D Converter
AD9480
FEATURES
DNL =
±
0.25 LSB
INL =
±
0.5 LSB
Single 3.3 V supply operation (3.0 to 3.6 V)
Power dissipation of 590 mW at 250 MSPS
1 V p-p analog input range
Internal 1.0 V reference
Single-ended or differential analog inputs
LVDS outputs (ANSI 644 levels)
Power-down mode
Clock duty cycle stabilizer
APPLICATIONS
Digital oscilloscopes
Instrumentation and measurement
Communications:
Point-to-point radios
Predistortion loops
GENERAL DESCRIPTION
The AD9480 is an 8-bit, monolithic analog-to-digital converter
optimized for high speed and low power consumption. Small in
size and easy to use, the product operates at a 250 MSPS
conversion rate, with excellent linearity and dynamic
performance over its full operating range.
To minimize system cost and power dissipation, the AD9480
includes an internal reference and track-and-hold circuit. The
user only provides a 3.3 V power supply and a differential
encode clock. No external reference or driver components are
required for many applications.
The digital outputs are LVDS (ANSI 644) compatible with an
option of twos complement or binary output format. The output
data bits are provided in parallel fashion along with an LVDS
output clock, which simplifies data capture.
Fabricated on an advanced BiCMOS process, the AD9480 is
available in a 44-lead surface-mount package (TQFP) specified
over the industrial temperature range (
40
°
C to +85
°
C).
FUNCTIONAL BLOCK DIAGRAM
D7–D0
(LVDS)
(LVDS)
VIN+
VIN–
CLK+
CLK–
VREF SENSE
DCO+
DCO-
AGND
DrGND
DRVDD
AVDD
AD9480
LVDSBIAS
PDWN
S1
LVDS
CLOCK
MGMT
T&H
8-BIT
ADC
PIPELINE
CORE
LOGIC
REFERENCE
16
8
0
Figure 1.
PRODUCT HIGHLIGHTS
1.
Superior linearity.
A DNL of ±0.25 makes the AD9480 suitable for
instrumentation and measurement applications.
2.
Power-down mode.
A power-down function may be exercised to bring total
consumption down to 15 mW.
3.
LVDS outputs (ANSI-644).
LVDS outputs simplify timing and improve noise
performance.
Rev.
0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Tel: 781.329.4700
www.analog.com
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相關代理商/技術參數
參數描述
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