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參數資料
| 型號： | AD9573ARUZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 1/12頁 |
| 文件大小： | 0K |
| 描述： | IC PCI CLCOK GEN 25MHZ 16TSSOP |
| 標準包裝： | 1,000 |
| 系列： | PCI Express® (PCIe) |
| 類型： | 時鐘/頻率發生器，扇出緩沖器（分配） |
| PLL： | 是 |
| 主要目的： | PCI Express（PCIe） |
| 輸入： | 晶體 |
| 輸出： | LVCMOS，LVDS |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 100MHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
PCI-Express Clock Generator IC,
PLL Core, Dividers, Two Outputs
AD9573
FEATURES
Fully integrated VCO/PLL core
0.54 ps rms jitter from 12 kHz to 20 MHz
Input crystal frequency of 25 MHz
Preset divide ratios for 100 MHz, 33.33 MHz
LVDS/LVCMOS output format
Integrated loop filter
Space saving 4.4 mm × 5.0 mm TSSOP
0.235 W power dissipation
3.3 V operation
APPLICATIONS
Line cards, switches, and routers
CPU/PCIe applications
Low jitter, low phase noise clock generation
GENERAL DESCRIPTION
The AD9573 provides a highly integrated, dual output clock
generator function including an on-chip PLL core that is
optimized for PCI-e applications. The integer-N PLL design
is based on the Analog Devices, Inc., proven portfolio of high
performance, low jitter frequency synthesizers to maximize line
card performance. Other applications with demanding phase
noise and jitter requirements also benefit from this part.
The PLL section consists of a low noise phase frequency
detector (PFD), a precision charge pump, a low phase noise
voltage controlled oscillator (VCO), and a preprogrammed
feedback divider and output divider.
By connecting an external 25 MHz crystal, output frequencies
of 100 MHz and 33.33 MHz can be locked to the input reference.
The output divider and feedback divider ratios are prepro-
grammed for the required output rates. No external loop filter
components are required, thus conserving valuable design time
and board space.
The AD9573 is available in a 16-lead 4.4 mm × 5.0 mm TSSOP
and can be operated from a single 3.3 V supply. The temperature
range is 40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
VDD × 5
OE
GND × 5
AD9573
XTAL
OSC
VCO
PF
D
/C
P
3R
D
O
R
DE
R
LP
F
D
IV
IDE
RS
LDO
100MHz
LVDS
LVCMOS
33.33MHz
07
50
0-
00
1
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2009 Analog Devices, Inc. All rights reserved.
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相關代理商/技術參數 |
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| AD9573-EVALZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:PCI-Express Clock Generator IC, PLL Core, Dividers, Two Outputs |
| AD9574BCPZ | 功能描述:IC PLL CLOCK GEN 25MHZ 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態:有效 類型:* PLL:帶旁路 輸入:時鐘 輸出:CMOS，HCSL，HSTL，LVDS 電路數:1 比率 - 輸入:輸出:2：7 差分 - 輸入:輸出:是/是 頻率 - 最大值:312.5MHz 分頻器/倍頻器:是/是 電壓 - 電源:2.97 V ~ 3.63 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤，CSP 供應商器件封裝:48-LFCSP-WQ（7x7） 標準包裝:1 |
| AD9574BCPZ-REEL7 | 功能描述:IC PLL CLOCK GEN 25MHZ 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態:有效 類型:* PLL:帶旁路 輸入:時鐘 輸出:CMOS，HCSL，HSTL，LVDS 電路數:1 比率 - 輸入:輸出:2：7 差分 - 輸入:輸出:是/是 頻率 - 最大值:312.5MHz 分頻器/倍頻器:是/是 電壓 - 電源:2.97 V ~ 3.63 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤，CSP 供應商器件封裝:48-LFCSP-WQ（7x7） 標準包裝:750 |
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| AD9575ARUZLVD | 功能描述:IC PLL CLOCK GEN 25MHZ 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:PCI Express® (PCIe) 標準包裝:28 系列:- 類型:時鐘/頻率發生器 PLL:是 主要目的:Intel CPU 服務器 輸入:時鐘 輸出:LVCMOS 電路數:1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應商設備封裝:64-TSSOP 包裝:管件 |
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