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參數(shù)資料
| 型號(hào)： | AD96687BR-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Ultrafast Comparators |
| 中文描述： | DUAL COMPARATOR, 3000 uV OFFSET-MAX, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大?。?/td> | 129K |
| 代理商： | AD96687BR-REEL |
AD96685/AD96687
–3–
REV. C
FUNCT IONAL DE SCRIPT ION
Pin Name
Description
+V
S
NONINVERT ING INPUT
Positive supply terminal, nominally +5.0 V.
Noninverting analog input of the differential input stage. T he NONINVERT ING INPUT must be
driven in conjunction with the INVERT ING INPUT .
Inverting analog input of the differential input stage. T he INVERT ING INPUT must be driven in
conjunction with the NONINVERT ING INPUT .
In the “compare” mode (logic HIGH), the output will track changes at the input of the compara-
tor. In the “l(fā)atch” mode (logic LOW), the output will reflect the input state just prior to the
comparator being placed in the “l(fā)atch” mode.
LATCH ENABLE
must be driven in conjunction
with LAT CH ENABLE for the AD96687.
In the “compare” mode (logic LOW), the output will track changes at the input of the comparator.
In the “l(fā)atch” mode (logic HIGH), the output will reflect the input state just prior to the compara-
tor being placed in the “l(fā)atch” mode. LAT CH ENABLE must be driven in conjunction with
LATCH ENABLE
for the AD96687.
Negative supply terminal, nominally –5.2 V.
One of two complementary outputs. Q will be at logic HIGH if the analog voltage at the
NONINVERT ING INPUT is greater than the analog voltage at the INVERT ING INPUT (pro-
vided the comparator is in the “compare” mode). See LAT CH ENABLE and LAT CH ENABLE
(AD96687 only) for additional information.
One of two complementary outputs.
Q
will be at logic LOW if the analog voltage at the
NONINVERT ING INPUT is greater than the analog voltage at the INVERT ING INPUT
(provided the comparator is in the “compare” mode). See LAT CH ENABLE and LAT CH EN-
ABLE (AD96687 only) for additional information.
One of two grounds, but primarily associated with the digital ground. Both grounds should be con-
nected together near the comparator.
One of two grounds, but primarily associated with the analog ground. Both grounds should be con-
nected together near the comparator.
INVERT ING INPUT
LAT CH ENABLE
LATCH ENABLE
–V
S
Q
Q
GROUND 1
GROUND 2
PIN DE SIGNAT IONS
AD96685BQ/T Q/BR
AD96687BQ/T Q/BR
AD96685BP
AD96685BH
AD96687BP
NC = NO CONNECT
NC = NO CONNECT
NC = NO CONNECT
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD96687BRZ | 功能描述:IC COMPARATOR DUAL 2.5NS 16-SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，開路集電極，TTL 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:7mV @ 5V 電流 - 輸入偏壓（最小值）:0.25µA @ 5V 電流 - 輸出（標(biāo)準(zhǔn)）:84mA @ 5V 電流 - 靜態(tài)（最大值）:120µA CMRR, PSRR（標(biāo)準(zhǔn)）:- 傳輸延遲（最大）:600ns 磁滯:- 工作溫度:-40°C ~ 85°C 封裝/外殼:SC-74A，SOT-753 安裝類型:表面貼裝 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:1268 (CN2011-ZH PDF) 其它名稱:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| AD96687BRZ-REEL | 功能描述:IC COMPARATOR DUAL 2.5NS 16SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| AD96687TE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Comparator |
| AD96687TQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultrafast Comparators |
| AD9668ACPZ-R2 | 制造商:Analog Devices 功能描述:LASER DRVR 4-CH 32LFCSP - Tape and Reel |
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