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參數資料
| 型號： | AD9701SQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 250 MSPS Video Digital-to-Analog Converter |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.012 us SETTLING TIME, 8-BIT DAC, CDIP22 |
| 封裝： | CERDIP-22 |
| 文件頁數： | 5/6頁 |
| 文件大小： | 127K |
| 代理商： | AD9701SQ |
–5–
REV. A
AD9701
DIE LAY OUT AND ME CHANICAL INFORMAT ION
Die Dimensions . . . . . . . . . . . . . . . . 107
3
104
3
15 (
±
2) mils
Pad Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
4 mils
Metalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Aluminum
Backing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . None
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–V
S
Passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oxynitride
Die Attach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Gold Eutectic
Bond Wire . . . . . . . 1.25 mil Aluminum; Ultrasonic Bonding or
1 mil Gold; Gold Ball Bonding
APPLICAT IONS INFORMAT ION
Raster scan video displays image data on a line by line basis,
with timing and control signals inserted between the lines. T he
control signals include the horizontal synchronization pulses,
which are used to align the display circuitry at the beginning of
each line. After the complete video image is displayed on the
monitor, the process begins again with the next image. T he ver-
tical reset pulse(s) that initiate this timing sequence are located
between each video image.
Raster Graphics Configuration for TTL Systems
T he image data is distinguished from the timing information by
its location relative to the blanking level. T he blanking reference
level is at the blackest extreme of the image data and all timing
signals are designed to fall below the blanking level so as not to
be seen on the monitor. T he actual image data is located above
the blanking level and it may be further separated from the tim-
ing signal by the setup level. T he setup level is simply a buffer
zone between the timing and image data.
Generation of the timing signals for the AD9701 is controlled
by the
COMPOSITE BLANKING
and the
COMPOSITE
SYNC
inputs. In normal operation, the output level of the
AD9701 is forced to the blanking level (black) with the
COM-
POSITE BLANKING
control so that when the synchronization
occurs, it will not interfere (be seen) with the monitor image.
T he
COMPOSITE SYNC
control forces the output level below
the blanking level, generating the synchronization pulse.
T he “grey scale” is the image intensity range located above the
blanking level by the amount of the setup level. T he setup level
is “reference black,” the darkest displayable picture intensity.
T he top of the “grey scale” is “reference white” or the brightest
picture intensity. As an 8-bit device, the AD9701 divides the
“gray scale” into 256 individual levels.
Normal raster scan waveforms divide the region between the
blanking level and reference white into 100 IRE units (Interna-
tional Radio Engineers). T he setup level can range from 0 to 20
IRE units but typically is around 10 IRE units, and the synchro-
nization pulse level typically falls 40 IRE units below the blank-
ing level. For the AD9701, the reference white level is 10 IRE
units below the full-scale output range (0 mA
OUT
).
In terms of priority, the
REFERENCE WHITE
control over-
rides the data inputs, but both
COMPOSITE SYNC
and
COMPOSITE BLANKING
override the data inputs and the
REFERENCE WHITE
control. A fourth control is active at all
times,
10% BRIGHT
, which adds approximately 10 IRE units
to the output level no matter what the input state of the
AD9701. T he
10% BRIGHT
control is primarily used to high-
light areas of the video image.
As with any high-speed device, the AD9701 requires a substan-
tial low impedance ground plane and high quality ground con-
nections to achieve the best performance. Performance can also
be improved with adequate power supply decoupling near the
supply pins of the AD9701. In ECL mode, the output of the
AD9701 is designed to drive 75
cable directly, with 75
ter-
minations to ground at both ends of the cable. For T T L con-
figurations, the output should be terminated to +5.0 V through
an 82
resistor (see circuit below).
Standard Reconstruction Configuration
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| AD9702 | 制造商:AD 制造商全稱:Analog Devices 功能描述:TRIPLE 4-BIT D/A CONVERTER |
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