參數資料
| 型號： | AD9748ACPZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 1/24頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT 210MSPS 32LFCSP |
| 標準包裝： | 1,500 |
| 系列： | TxDAC® |
| 設置時間： | 11ns |
| 位數： | 8 |
| 數據接口： | 并聯 |
| 轉換器數目： | 1 |
| 電壓電源： | 模擬和數字 |
| 功率耗散（最大）： | 145mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸出數目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 210M |
8-Bit, 210 MSPS TxDAC D/A Converter
Data Sheet
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2003–2013 Analog Devices, Inc. All rights reserved.
FEATURES
High performance member of pin-compatible
TxDAC product family
Linearity
0.1 LSB DNL
0.1 LSB INL
Twos complement or straight binary data format
Differential current outputs: 2 mA to 20 mA
Power dissipation: 135 mW @ 3.3 V
Power-down mode: 15 mW @ 3.3 V
On-chip 1.20 V reference
CMOS-compatible digital interface
32-lead LFCSP
Edge-triggered latches
Fast settling: 11 ns to 0.1% full-scale
APPLICATIONS
Communications
Direct digital synthesis (DSS)
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
1.2V REF
3.3V
RSET
0.1
F
CLK+
SLEEP
REFIO
FS ADJ
DVDD
DCOM
DIGITAL DATA INPUTS (DB7–DB0)
150pF
3.3V
AVDD
ACOM
AD9748
CURRENT
SOURCE
ARRAY
IOUTA
IOUTB
MODE
LSB
SWITCHES
SEGMENTED
SWITCHES
3.3V
CLKVDD
CLKCOM
CLK–
CMODE
LATCHES
03211-001
Figure 1.
GENERAL DESCRIPTION
member of the TxDAC series of high performance, low power
CMOS digital-to-analog converters (DACs). The TxDAC
family, consisting of pin-compatible 8-, 10-, 12-, and 14-bit
DACs, is specifically optimized for the transmit signal path of
communication systems. All of the devices share the same
interface options, small outline package, and pinout, providing
an upward or downward component selection path based on
performance, resolution, and cost. The AD9748 offers
exceptional ac and dc performance while supporting update
rates up to 210 MSPS.
The AD9748’s low power dissipation makes it well suited for
portable and low power applications. Its power dissipation can
be further reduced to 60 mW with a slight degradation in
performance by lowering the full-scale current output. In
addition, a power-down mode reduces the standby power
dissipation to approximately 15 mW. A segmented current
source architecture is combined with a proprietary switching
technique to reduce spurious components and enhance
dynamic performance.
Edge-triggered input latches and a 1.2 V temperature-
compensated band gap reference have been integrated to
provide a complete monolithic DAC solution. The digital inputs
support 3 V CMOS logic families.
PRODUCT HIGHLIGHTS
1. 32-lead LFCSP.
2. The AD9748 is the 8-bit member of the pin-compatible
TxDAC family, which offers excellent INL and DNL
performance.
3. Differential or single-ended clock input (LVPECL or
CMOS), supports 210 MSPS conversion rate.
4. Data input supports twos complement or straight binary
data coding.
5. Low power: Complete CMOS DAC function operates on
135 mW from a 2.7 V to 3.6 V single supply. The DAC full-
scale current can be reduced for lower power operation,
and a sleep mode is provided for low power idle periods.
6. On-chip voltage reference: The AD9748 includes a 1.2 V
temperature-compensated band gap voltage reference.
1
Protected by U.S. Patent Numbers 5568145, 5689257, and 5703519.
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