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參數(shù)資料
| 型號： | AD9761 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual 10-Bit TxDAC with 23 Interpolation Filters(內(nèi)插濾波器的雙10位D/A轉(zhuǎn)換器) |
| 中文描述： | 雙10與23位插值濾波器TxDAC系列（內(nèi)插濾波器的雙10位的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 1/24頁 |
| 文件大小： | 294K |
| 代理商： | AD9761 |
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD9761
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
Analog Devices, Inc., 1997
Dual 10-Bit TxDAC+ *
wth 2
3
Interpolation Filters
FUNCT IONAL BLOCK DIAGRAM
ACOM
REFLO
FSADJ
REFIO
"I"
DAC
IOUTA
IOUTB
WRITE INPUT
SELECT INPUT
DCOM
DVDD
CLOCK
AD9761
2x
LATCH
"I"
REFERENCE
COMP1
COMP2
COMP3
BIAS
GENERATOR
"Q"
QOUTA
QOUTB
2x
LATCH
"Q"
MUX
CONTROL
AVDD
DAC DATA
INPUTS
(10 BITS)
SLEEP
FEATURES
Complete 10-Bit, 40 MSPS Dual Transmit DAC
Excellent Gain and Offset Matching
Differential Nonlinearity Error: 0.5 LSB
Effective Number of Bits: 9.5
Signal-to-Noise and Distortion Ratio: 59 dB
Spurious-Free Dynamic Range: 71 dB
2
3
Interpolation Filters
20 MSPS/Channel Data Rate
Single Supply: +2.7 V to +5.5 V
Low Power Dissipation: 200 mW (+3 V Supply @
40 MSPS)
On-Chip Reference
28-Lead SSOP
PRODUCT DE SCRIPT ION
T he AD9761 is a complete dual channel, high speed, 10-bit
CMOS DAC. T he AD9761 has been developed specifically for
use in wide bandwidth communication applications (e.g., spread
spectrum) where digital I and Q information is being processed
during transmit operations. It integrates two 10-bit, 40 MSPS
DACs, dual 2
×
interpolation filters, a voltage reference, and
digital input interface circuitry. T he AD9761 supports a
20 MSPS per channel input data rate that is then interpolated
by 2
×
up to 40 MSPS before simultaneously updating each
DAC.
T he interleaved I and Q input data stream is presented to the
digital interface circuitry, which consists of I and Q latches as well
as some additional control logic. T he data is de-interleaved back
into its original I and Q data. An on-chip state machine ensures the
proper pairing of I and Q data. T he data output from each latch is
then processed by a 2
×
digital interpolation filter that eases the
reconstruction filter requirements. T he interpolated output of each
filter serves as the input of their respective 10-bit DAC.
T he DACs utilize a segmented current source architecture com-
bined with a proprietary switching technique to reduce glitch
energy and to maximize dynamic accuracy. Each DAC provides
differential current output thus supporting single-ended or
differential applications. Both DACs are simultaneously up-
dated and provide a nominal full-scale current of 10 mA. Also,
the full-scale currents between each DAC are matched to within
0.07 dB (i.e., 0.75%), thus eliminating the need for additional
gain calibration circuitry.
T he AD9761 is manufactured on an advanced low cost CMOS
process. It operates from a single supply of 2.7 V to 5.5 V and
consumes 200 mW of power. T o make the AD9761 complete it
also offers an internal 1.20 V temperature-compensated bandgap
reference.
*
T xDAC+ is a trademark of Analog Devices, Inc.
PRODUCT HIGHLIGHT S
1. Dual 10-bit, 40 MSPS DACs: A pair of high performance
40 MSPS DACs optimized for low distortion performance
provide for flexible transmission of I and Q information.
2. 2
×
Digital Interpolation Filters: Dual matching FIR interpo-
lation filters with 62.5 dB stop band rejection precede each
DAC input thus reducing the DACs’ reconstruction filter
requirements.
3. Low Power: Complete CMOS Dual DAC function operates
on a low 200 mW on a single supply from 2.7 V to 5.5 V.
T he DAC full-scale current can be reduced for lower power
operation, and a sleep mode is provided for power reduction
during idle periods.
4. On-Chip Voltage Reference: T he AD9761 includes a 1.20 V
temperature-compensated bandgap voltage reference.
5. Single 10-Bit Digital Input Bus: T he AD9761 features a
flexible digital interface allowing each DAC to be addressed
in a variety of ways including different update rates.
6. Small Package: T he AD9761 offers the complete integrated
function in a compact 28-lead SSOP package.
7. Product Family: T he AD9761 Dual T ransmit DAC has a
pair of Dual Receive ADC companion products, the AD9281
(8 bits) and AD9201 (10 bits).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9762 | Analog Devices: Data Converters: DAC 12-Bit, 10 ns to 100 ns Converters Selection Table |
| AD9762-EB | 12-Bit, 125 MSPS TxDAC D/A Converter |
| AD9762AR | 12-Bit, 125 MSPS TxDAC D/A Converter |
| AD9762ARU | 12-Bit, 125 MSPS TxDAC D/A Converter |
| AD9765 | Analog Devices: Data Converters: DAC 12-Bit, 10 ns to 100 ns Converters Selection Table |
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