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參數資料
| 型號： | AD9840A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete 10-Bit 40 MSPS CCD Signal Processor |
| 中文描述： | 完整的10位40 MSPS的CCD信號處理器 |
| 文件頁數： | 14/16頁 |
| 文件大小： | 162K |
| 代理商： | AD9840A |
AD9840A
–14–
REV. 0
APPLICATIONS INFORMATION
The AD9840A is a complete Analog Front End (AFE) product
for digital still camera and camcorder applications. As shown in
Figure 16, the CCD image (pixel) data is buffered and sent to
the AD9840A analog input through a series input capacitor. The
AD9840A performs the dc restoration, CDS, gain adjustment,
black level correction, and analog-to-digital conversion. The
AD9840A’s digital output data is then processed by the image
processing ASIC. The internal registers of the AD9840A—used
to control gain, offset level, and other functions—are programmed
by the ASIC or microprocessor through a 3-wire serial digital
interface. A system timing generator provides the clock signals
for both the CCD and the AFE.
Internal Power-On Reset Circuitry
After power-on, the AD9840A will automatically reset all internal
registers and perform internal calibration procedures. This takes
approximately 1 ms to complete. During this time, normal clock
signals and serial write operations may occur. However, serial
register writes will be ignored until the internal reset operation is
completed. Pin 43 (formerly RSTB on the AD9843 non-A) is no
longer used for the reset operation. Toggling Pin 43 in the
AD9840A will have no effect.
CCD
CCDIN
BUFFER
V
OUT
0.1 F
ADC
OUT
REGISTER
DATA
SERIAL
INTERFACE
DIGITAL
OUTPUTS
DIGITAL IMAGE
PROCESSING
ASIC
TIMING
GENERATOR
V-DRIVE
CCD
TIMING
CDS/CLAMP
TIMING
AD9840A
Figure 16. System Applications Diagram
Grounding and Decoupling Recommendations
As shown in Figure 17, a single ground plane is recommended
for the AD9840A. This ground plane should be as continuous
as possible, particularly around Pins 25 through 39. This will
ensure that all analog decoupling capacitors provide the lowest
possible impedance path between the power and bypass pins
and their respective ground pins. All decoupling capacitors
should be located as close as possible to the package pins. A
single clean power supply is recommended for the AD9840A,
but a separate digital driver supply may be used for DRVDD
(Pin 13). DRVDD should always be decoupled to DRVSS (Pin
14), which should be connected to the analog ground plane.
Advantages of using a separate digital driver supply include
using a lower voltage (2.7 V) to match levels with a 2.7 V ASIC,
reducing digital power dissipation, and reducing potential noise
coupling. If the digital outputs (Pins 3–12) must drive a load
larger than 20 pF, buffering is recommended to reduce digital
code transition noise. Alternatively, placing series resistors
close to the digital output pins may help reduce noise.
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相關代理商/技術參數 |
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| AD9840AJST | 制造商:Analog Devices 功能描述:AFE Video 1ADC 10-Bit 3V 48-Pin LQFP 制造商:Analog Devices 功能描述:AFE VID 1ADC 10-BIT 3.3V 48LQFP - Bulk |
| AD9840AJSTRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 10-Bit 3V 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:AFE VID 1ADC 10-BIT 3.3V 48LQFP - Tape and Reel |
| AD9840AJSTZ | 功能描述:IC CCD SIGNAL PROC 10BIT 48-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數字 輸出類型:數字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9840AJSTZRL | 功能描述:IC CCD SIGNAL PROC 10BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數字 輸出類型:數字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9840-EB | 制造商:Analog Devices 功能描述:10 BIT 40HZ ANALOG FRONT END NO PXGA - Bulk |
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