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參數資料
| 型號： | AD9944KCPZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, MO-220-VHHD-2, LFCSP-32 |
| 文件頁數： | 19/20頁 |
| 文件大?。?/td> | 485K |
| 代理商： | AD9944KCPZRL |
AD9943/AD9944
Rev. B | Page 19 of 20
24 REFB
23 REFT
22 CCDIN
21 AVSS
20 AVDD
D2 1
D3 2
D0
D1
D4 3
19 SHD
18 SHP
17 CLPOB
D5 4
D6 5
D7 6
D8 7
D9 8
DATA
OUTPUTS
12
D
D
9
10
3V
DRIVER
SUPPLY
3V
ANALOG
SUPPLY
3V
ANALOG
SUPPLY
D
D
D
D
D
P
12 13 14 15 16
5
CLOCK
INPUTS
3
SERIAL
INTERFACE
CCDIN
AD9944
(Not to Scale)
TOP VIEW
1.0
μ
F
1.0
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
NC = NO CONNECT
PIN 1
IDENTIFIER
32 31 30 29 28 27 26 25
N
N
N
S
S
S
11
0
Figure 18. AD9944 Recommended Circuit Configuration for CCD Mode
INTERNAL POWER-ON RESET CIRCUITRY
After power-on, the AD9943/AD9944 automatically reset all
internal registers and perform internal calibration procedures.
This takes approximately 1 ms to complete. During this time,
normal clock signals and serial write operations may occur.
However, serial register writes are ignored until the internal
reset operation is completed.
GROUNDING AND DECOUPLING
RECOMMENDATIONS
As shown in Figure 17 and Figure 18, a single ground plane is
recommended for the AD9943/AD9944. This ground plane
should be as continuous as possible. This ensures that all analog
decoupling capacitors provide the lowest possible impedance
path between the power and bypass pins and their respective
ground pins. All decoupling capacitors should be located as
close as possible to the package pins. A single clean power
supply is recommended for the AD9943 and AD9944, but a
separate digital driver supply may be used for DRVDD (Pin 11).
DRVDD should always be decoupled to DRVSS (Pin 12), which
should be connected to the analog ground plane. Advantages of
using a separate digital driver supply include using a lower
voltage (2.7 V) to match levels with a 2.7 V ASIC, and reducing
digital power dissipation and potential noise coupling. If the
digital outputs must drive a load larger than 20 pF, buffering
is the recommended method to reduce digital code transition
noise. Alternatively, placing series resistors close to the digital
output pins may also help reduce noise.
Note: The exposed pad on the bottom of the AD9943/AD9944
should be soldered to the GND plane of the printed circuit
board.
相關PDF資料 |
PDF描述 |
|---|---|
| AD9943KCP | Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors |
| AD9943KCPRL | Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors |
| AD9943KCPZ | Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors |
| AD9945KCPZ | Complete 12-Bit 40 MHz CCD Signal Processor |
| AD9945KCPZRL7 | Complete 12-Bit 40 MHz CCD Signal Processor |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9944KCPZRL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 10-Bit and 12-Bit, 25 MHz CCD Signal Processors |
| AD9945 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete 12-Bit 40 MHz CCD Signal Processor |
| AD9945KCP | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V 32-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:12 BIT 40 MSPS FRONT END CONVERTER - Bulk |
| AD9945KCPRL | 制造商:Analog Devices 功能描述:AFE Video 1ADC 12-Bit 3V 32-Pin LFCSP EP T/R 制造商:Rochester Electronics LLC 功能描述:12 BIT 40 MSPS FRONT END CONVERTER - Tape and Reel |
| AD9945KCPRL7 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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