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參數資料
| 型號： | AD9959BCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 1/44頁 |
| 文件大小： | 0K |
| 描述： | IC DDS QUAD 10BIT DAC 56LFCSP |
| 產品培訓模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 設計資源： | Phase Coherent FSK Modulator (CN0186) |
| 標準包裝： | 750 |
| 分辨率（位）： | 10 b |
| 主 fclk： | 500MHz |
| 調節字寬（位）： | 32 b |
| 電源電壓： | 1.71 V ~ 1.96 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 56-LFCSP-VQ（8x8） |
| 包裝： | 帶卷 (TR) |
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4-Channel, 500 MSPS DDS
with 10-Bit DACs
AD9959
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2005–2008 Analog Devices, Inc. All rights reserved.
FEATURES
4 synchronized DDS channels @ 500 MSPS
Independent frequency/phase/amplitude control between
channels
Matched latencies for frequency/phase/amplitude changes
Excellent channel-to-channel isolation (>65 dB)
Linear frequency/phase/amplitude sweeping capability
Up to 16 levels of frequency/phase/amplitude modulation
(pin-selectable)
4 integrated 10-bit digital-to-analog converters (DACs)
Individually programmable DAC full-scale currents
0.12 Hz or better frequency tuning resolution
14-bit phase offset resolution
10-bit output amplitude scaling resolution
Serial I/O port interface (SPI) with enhanced data throughput
Software-/hardware-controlled power-down
Dual supply operation (1.8 V DDS core/3.3 V serial I/O)
Multiple device synchronization
Selectable 4× to 20× REFCLK multiplier (PLL)
Selectable REFCLK crystal oscillator
56-lead LFCSP package
APPLICATIONS
Agile local oscillators
Phased array radars/sonars
Instrumentation
Synchronized clocking
RF source for AOTF
FUNCTIONAL BLOCK DIAGRAM
(4)
500MSPS
DDS CORES
REF CLOCK
INPUT CIRCUITRY
TIMING AND
CONTROL
MODULATION
CONTROL
SYSTEM
CLOCK
SOURCE
USER INTERFACE
RECONSTRUCTED
SINE WAVE
RECONSTRUCTED
SINE WAVE
RECONSTRUCTED
SINE WAVE
RECONSTRUCTED
SINE WAVE
10-BIT DAC
05
24
6-
1
01
Figure 1.
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