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參數資料
| 型號： | AD9983A/PCBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 1/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVALUATION AD9983A |
| 標準包裝： | 1 |
| 系列： | Advantiv® |
| 主要目的： | 視頻，視頻處理 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9983A |
| 主要屬性： | 3 x 8-Bit 140 MSPS ADC's |
| 次要屬性： | 集成式 PLL 和 VCO |
| 已供物品： | 板 |
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High Performance
8-Bit Display Interface
AD9983A
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007 Analog Devices, Inc. All rights reserved.
FEATURES
8-bit analog-to-digital converters
140 MSPS maximum conversion rate
Low PLL clock jitter at 140 MSPS
Automatic gain matching
Automated offset adjustment
2:1 input mux
Power-down via dedicated pin or serial register
4:4:4, 4:2:2, and DDR output format modes
Variable output drive strength
Odd/even field detection
External clock input
Regenerated Hsync output
Programmable output high impedance control
Hsyncs per Vsync counter
Pb-free package
APPLICATIONS
Advanced TVs
Plasma display panels
LCDTV
HDTV
RGB graphics processing
LCD monitors and projectors
Scan converters
FUNCTIONAL BLOCK DIAGRAM
SYNC
PROCESSING
PLL
POWER
MANAGEMENT
SOGOUT
O/E FIELD
HSOUT
VSOUT/A0
VOLTAGE
REFS
SERIAL REGISTER
SDA
SCL
FILT
CLAMP
EXTCK/COAST
HSYNC0
HSYNC1
AD9983A
Y/GREENOUT
Cb/Cr/REDOUT
REFHI
REFLO
DATACK
2:1
MUX
Pr/REDIN0
Pr/REDIN1
Y/GREENIN0
Y/GREENIN1
VSYNC1
VSYNC0
2:1
MUX
SOGIN0
SOGIN1
2:1
MUX
O
UT
P
UT
DAT
A
F
O
RM
AT
T
E
R
Cb/BLUEOUT
CLAMP
8
AUTO OFFSET
AUTO GAIN
8-BIT
ADC
PGA
Pb/BLUEIN0
Pb/BLUEIN1
2:1
MUX
CLAMP
8
AUTO OFFSET
AUTO GAIN
8-BIT
ADC
PGA
2:1
MUX
CLAMP
8
AUTO OFFSET
AUTO GAIN
8-BIT
ADC
PGA
2:1
MUX
06475-
001
Figure 1.
GENERAL DESCRIPTION
The AD9983A is a complete 8-bit, 140 MSPS, monolithic
analog interface optimized for capturing YPbPr video and RGB
graphics signals. Its 140 MSPS encode rate capability and full
power analog bandwidth of 300 MHz support all HDTV video
modes up to 1080i and 720p as well as graphics resolutions up
to SXGA (1280 x 1024 at 75 Hz).
The AD9983A includes a 140 MHz triple ADC with an internal
reference, a PLL, and programmable gain, offset, and clamp
control. The user provides only a 1.8 V power supply and an
analog input. Three-state CMOS outputs can be powered from
1.8 V to 3.3 V.
The AD9983A on-chip PLL generates a sample clock from the
tri-level sync (for YPbPr video) or the horizontal sync (for RGB
graphics). Sample clock output frequencies range from 10 MHz
to 140 MHz. With internal coast generation, the PLL maintains
its output frequency in the absence of sync input. A 32-step
sampling clock phase adjustment is provided. Output data,
sync, and clock phase relationships are maintained.
The auto-offset feature can be enabled to automatically restore
the signal reference levels and to automatically calibrate out any
offset differences between the three channels. The auto channel-
to-channel gain matching feature can be enabled to minimize
any gain mismatches between the three channels.
The AD9983A also offers full sync processing for composite
sync and sync-on-green applications. A clamp signal is
generated internally or may be provided by the user through the
CLAMP input pin.
Fabricated in an advanced CMOS process, the AD9983A is
provided in a space-saving 80-lead, Pb-free, LQFP surface-
mount plastic package, and is specified over the 0°C to 70°C
temperature range.
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