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參數(shù)資料
| 型號(hào)： | ADCMP580BCP-RL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Ultrafast SiGe Voltage Comparators |
| 中文描述： | COMPARATOR, 10000 uV OFFSET-MAX, 0.18 ns RESPONSE TIME, QCC16 |
| 封裝： | 3 X 3 MM, MO-220VEED-2, LFCSP-16 |
| 文件頁(yè)數(shù)： | 12/16頁(yè) |
| 文件大小： | 284K |
| 代理商： | ADCMP580BCP-RL7 |
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ADCMP580/ADCMP581/ADCMP582
OPTIMIZING HIGH SPEED PERFORMANCE
As with any high speed comparator, proper design and layout
techniques are essential to obtaining the specified performance.
Stray capacitance, inductance, inductive power, and ground
impedances or other layout issues can severely limit performance
and can cause oscillation. Discontinuities along input and output
transmission lines can also severely limit the specified pulse
width dispersion performance.
Rev. 0 | Page 12 of 16
For applications in a 50 Ω environment, input and output
matching have a significant impact on data-dependent (or
deterministic) jitter (DJ) and pulse width dispersion
performance. The ADCMP58x family of comparators provides
internal 50 Ω termination resistors for both V
P
and V
N
inputs.
The return side for each termination is pinned out separately
with the V
TP
and V
TN
pins, respectively. If a 50 Ω termination
is desired at one or both of the V
P
/V
N
inputs, the V
TP
and V
TN
pins can be connected (or disconnected) to (from) the desired
termination potential as appropriate. The termination potential
should be carefully bypassed using ceramic capacitors as dis-
cussed previously to prevent undesired aberrations on the input
signal due to parasitic inductance in the termination return
path. If a 50 Ω termination is not desired, either one or both
of the V
TP
/V
TN
termination pins can be left disconnected. In this
case, the open pins should be left floating with no external pull
downs or bypassing capacitors.
For applications that require high speed operation but do not
have on-chip 50 Ω termination resistors, some reflections
should be expected, because the comparator inputs can no
longer provide matched impedance to the input trace leading
up to the device. It then becomes important to back-match the
drive source impedance to the input transmission path leading
to the input to minimize multiple reflections. For applications
in which the comparator is less than 1 cm from the driving
signal source, the source impedance should be minimized. High
source impedance in combination with parasitic input capaci-
tance of the comparator could cause undesirable degradation
in bandwidth at the input, thus degrading the overall response.
It is therefore recommended that the drive source impedance
should be no more than 50 Ω for best high speed performance.
COMPARATOR PROPAGATION
DELAY DISPERSION
The ADCMP58x family of comparators has been specifically
designed to reduce propagation delay dispersion over a wide
input overdrive range of 5 mV to 500 mV. Propagation delay
dispersion is a change in propagation delays, which results
from a change in the degree of overdrive or slew rate (how far
or fast the input signal exceeds the switching threshold). The
overall result is a higher degree of timing accuracy.
Propagation delay dispersion is a specification that becomes
important in critical timing applications, such as data commu-
nication, automatic test and measurement, instrumentation,
and event-driven applications, such as pulse spectroscopy,
nuclear instrumentation, and medical imaging. Dispersion
is defined as the variation in the overall propagation delay as
the input overdrive conditions are changed (see Figure 26 and
Figure 27). For the ADCMP58x family of comparators, disper-
sion is typically <25 ps, as the overdrive varies from 5 mV to
500 mV, and the input slew rate varies from 1 V/ns to 10 V/ns.
This specification applies for both positive and negative signals,
because the ADCMP58x family of comparators has almost
equal delays for positive- and negative-going inputs.
Q/Q OUTPUT
INPUT VOLTAGE
500mV OVERDRIVE
5mV OVERDRIVE
DISPERSION
V
N
± V
OS
0
Figure 26. Propagation Delay—Overdrive Dispersion
Q/Q OUTPUT
INPUT VOLTAGE
10V/ns
1V/ns
DISPERSION
V
N
± V
OS
0
Figure 27. Propagation Delay—Slew Rate Dispersion
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADCMP580BCP-WP | 制造商:Analog Devices 功能描述:Comparator Single ±5.5V 16-Pin LFCSP EP 制造商:Analog Devices 功能描述:IC ((NS)) |
| ADCMP580BCPZ-R2 | 功能描述:IC COMPARATOR CML UFAST 16-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ADCMP580BCPZ-RL7 | 功能描述:IC COMPARATOR CML UFAST 16-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標(biāo)準(zhǔn)）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標(biāo)準(zhǔn)）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ADCMP580BCPZ-WP | 功能描述:IC COMPARATOR CML UFAST 16-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，開(kāi)路集電極，TTL 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:7mV @ 5V 電流 - 輸入偏壓（最小值）:0.25µA @ 5V 電流 - 輸出（標(biāo)準(zhǔn)）:84mA @ 5V 電流 - 靜態(tài)（最大值）:120µA CMRR, PSRR（標(biāo)準(zhǔn)）:- 傳輸延遲（最大）:600ns 磁滯:- 工作溫度:-40°C ~ 85°C 封裝/外殼:SC-74A，SOT-753 安裝類型:表面貼裝 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:1268 (CN2011-ZH PDF) 其它名稱:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| ADCMP581 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultrafast SiGe Voltage Comparator |
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