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參數資料
| 型號： | ADF4108BRUZ-RL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | XO, clock |
| 英文描述： | PLL Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 8000 MHz, PDSO16 |
| 封裝： | LEAD FREE, TSSOP-16 |
| 文件頁數： | 4/20頁 |
| 文件大小： | 350K |
| 代理商： | ADF4108BRUZ-RL7 |
ADF4108
Rev. 0 | Page 4 of 20
Parameter
NOISE CHARACTERISTICS
Normalized Phase Noise Floor
9
Phase Noise Performance
10
7900 MHz Output
11
Spurious Signals
7900 MHz Output
11
1
Operating temperature range (B version) is –40°C to +85°C.
2
The B chip specifications are given as typical values.
3
This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency that
is less than this value.
4
AV
DD
= DV
DD
= 3.3 V.
5
AC coupling ensures AV
DD
/2 bias.
6
Guaranteed by design. Sample tested to ensure compliance.
7
T
A
= 25°C; AV
DD
= DV
DD
= 3.3 V; P = 32; RF
IN
= 8 GHz, f
PFD
= 200 kHz, REF
IN
= 10 MHz.
8
T
A
= 25°C; AV
DD
= DV
DD
= 3.3 V; R = 16,383; A = 63; B = 891; P = 32; RF
IN
= 7.0 GHz.
9
This value can be used to calculate phase noise for any application. Use the formula –219 + 10 log(f
PFD
) + 20 logN to calculate in-band phase noise performance as seen
at the VCO output. The value given is the lowest noise mode.
10
The phase noise is measured with the EVAL-ADF4108EB1 evaluation board, with the Hittite HMC506LP4 VCO. The spectrum analyzer provides the REFIN for the
synthesizer (f
REFOUT
= 10 MHz @ 0 dBm).
11
f
REFIN
= 10 MHz; f
PFD
= 1 MHz; f
RF
= 7900 MHz; N = 7900; loop B/W = 50 kHz, VCO = HMC506LP4, spurs are dominated by the leakage current on the tuning port of the
HMC506LP4 VCO.
B Version
1
219
81
–61
B Chips
2
(Typ)
219
81
–61
Unit
dBc/Hz typ
dBc/Hz typ
dBc typ
Test Conditions/Comments
@ VCO output
@ 1 kHz offset and 1 MHz PFD frequency
@ 1 MHz offset and 1 MHz PFD frequency
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