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參數(shù)資料
| 型號： | ADF4113BCHIPS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | XO, clock |
| 英文描述： | Circular Connector; No. of Contacts:37; Series:LJT06R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-35 |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 4000 MHz, UUC |
| 封裝： | DIE |
| 文件頁數(shù)： | 3/24頁 |
| 文件大小： | 263K |
| 代理商： | ADF4113BCHIPS |
REV. 0
–3–
ADF4110/ADF4111/ADF4112/ADF4113
Parameter
B Version
B Chips
2
Unit
Test Conditions/Comments
NOISE CHARACTERISTICS
ADF4113 Phase Noise Floor
7
–171
–164
–171
–164
dBc/Hz typ
dBc/Hz typ
@ 25 kHz PFD Frequency
@ 200 kHz PFD Frequency
@ VCO Output
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 300 Hz Offset and 30 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 200 Hz Offset and 10 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 200 kHz PFD Frequency
@ 1 kHz Offset and 1 MHz PFD Frequency
Phase Noise Performance
8
ADF4110: 540 MHz Output
9
ADF4111: 900 MHz Output
10
ADF4112: 900 MHz Output
10
ADF4113: 900 MHz Output
10
ADF4111: 836 MHz Output
11
ADF4112: 1750 MHz Output
12
ADF4112: 1750 MHz Output
13
ADF4112: 1960 MHz Output
14
ADF4113: 1960 MHz Output
14
ADF4113: 3100 MHz Output
15
Spurious Signals
ADF4110: 540 MHz Output
9
ADF4111: 900 MHz Output
10
ADF4112: 900 MHz Output
10
ADF4113: 900 MHz Output
10
ADF4111: 836 MHz Output
11
ADF4112: 1750 MHz Output
12
ADF4112: 1750 MHz Output
13
ADF4112: 1960 MHz Output
14
ADF4113: 1960 MHz Output
14
ADF4113: 3100 MHz Output
15
–91
–87
–90
–91
–78
–86
–66
–84
–85
–86
–91
–87
–90
–91
–78
–86
–66
–84
–85
–86
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
–97/–106
–98/–110
–91/–100
–100/–110
–81/–84
–88/–90
–65/–73
–80/–84
–80/–84
–80/–82
–97/–106
–98/–110
–91/–100
–100/–110
–81/–84
–88/–90
–65/–73
–80/–84
–80/–84
–82/–82
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
dBc typ
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 30 kHz/60 kHz and 30 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 10 kHz/20 kHz and 10 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
@ 1 MHz/2 MHz and 1 MHz PFD Frequency
NOTES
1
Operating temperature range is as follows: B Version: –40
°
C to +85
°
C.
2
The B Chip specifications are given as typical values.
3
This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency
which is less than this value.
4
AV
DD
= DV
DD
= 3 V; For AV
DD
= DV
DD
= 5 V, use CMOS-compatible levels.
5
Guaranteed by design.
6
T
A
= 25
°
C; AV
DD
= DV
DD
= 3 V; P = 16; SYNC = 0; DLY = 0; RF
IN
for ADF4110 = 540 MHz; RF
IN
for ADF4111, ADF4112, ADF4113 = 900 MHz.
7
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 logN (where N is the N divider value).
8
The phase noise is measured with the EVAL-ADF411XEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for
the synthesizer (f
REFOUT
= 10 MHz @ 0 dBm). SYNC = 0; DLY = 0 (See Table III).
9
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 540 MHz; N = 2700; Loop B/W = 20 kHz.
10
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 900 MHz; N = 4500; Loop B/W = 20 kHz.
11
f
REFIN
= 10 MHz; f
PFD
= 30 kHz; Offset frequency = 300 Hz; f
RF
= 836 MHz; N = 27867; Loop B/W = 3 kHz.
12
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 1750 MHz; N = 8750; Loop B/W = 20 kHz.
13
f
REFIN
= 10 MHz; f
PFD
= 10 kHz; Offset frequency = 200 Hz; f
RF
= 1750 MHz; N = 175000; Loop B/W = 1 kHz.
14
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 1960 MHz; N = 9800; Loop B/W = 20 kHz.
15
f
REFIN
= 10 MHz; f
PFD
= 1 MHz; Offset frequency = 1 kHz; f
RF
= 3100 MHz; N = 3100; Loop B/W = 20 kHz.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
1
Limit at T
MIN
to T
MAX
(B Version)
Parameter
Unit
Test Conditions/Comments
t
1
t
2
t
3
t
4
t
5
t
6
10
10
25
25
10
20
ns min
ns min
ns min
ns min
ns min
ns min
DATA to CLOCK Setup Time
DATA to CLOCK Hold Time
CLOCK High Duration
CLOCK Low Duration
CLOCK to LE Setup Time
LE Pulsewidth
NOTES
1
Guaranteed by design but not production tested.
Specifications subject to change without notice.
(AV
DD
= DV
DD
= 3 V 10%, 5 V 10%; AV
DD
≤
V
P
≤
6.0 V; AGND = DGND = CPGND = 0 V;
R
SET
= 4.7 k ; T
A
= T
MIN
to T
MAX
unless otherwise noted)
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參數(shù)描述 |
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