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參數(shù)資料
| 型號： | ADF4113HVBRUZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | XO, clock |
| 英文描述： | High Voltage Charge Pump, PLL Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 3700 MHz, PDSO16 |
| 封裝： | LEAD FREE, MO-153AB, TSSOP-16 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大小： | 385K |
| 代理商： | ADF4113HVBRUZ-RL |
ADF4113HV
DEVICE PROGRAMMING AFTER INITIAL
POWER-UP
Rev. 0 | Page 14 of 20
After initial power-up of the device, there are two ways to
program the device.
CE Pin Method
1.
Apply V
DD
.
2.
Bring CE low to put the device into power-down. This is an
asynchronous power-down in that it happens immediately.
3.
Program the function latch (10). Program the R counter
latch (00). Program the AB counter latch (01).
4.
Bring CE high to take the device out of power-down. The R
and AB counters resume counting in close alignment.
After CE goes high, a duration of 1 μs is sometimes required for
the prescaler band gap voltage and oscillator input buffer bias to
reach steady state.
CE can be used to power the device up and down to check for
channel activity. The input register does not need to be repro-
grammed each time the device is disabled and enabled as long
as it has been programmed at least once after V
DD
was initially
applied.
Counter Reset Method
1.
Apply V
DD
.
2.
Conduct a function latch load (10 in 2 LSBs). As part of
this, load 1 to the F1 bit. This enables the counter reset.
3.
Conduct an R counter load (00 in 2 LSBs).
4.
Conduct an AB counter load (01 in 2 LSBs).
5.
Conduct a function latch load (10 in 2 LSBs). As part of
this, load 0 to the F1 bit. This disables the counter reset.
This sequence provides the same close alignment as the initiali-
zation method. It offers direct control over the internal reset.
Note that counter reset holds the counters at load point and
three-states the charge pump, but does not trigger synchronous
power-down.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADF4113HVBRUZ-RL7 | 功能描述:IC CHARGE PUMP HV SYNTH 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4113HVSD1Z | 制造商:Analog Devices 功能描述:- Rail/Tube |
| ADF4116 | 制造商:AD 制造商全稱:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
| ADF4116_07 | 制造商:AD 制造商全稱:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
| ADF4116BCP | 制造商:AD 制造商全稱:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
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