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參數資料
| 型號： | ADF4153BRU-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | XO, clock |
| 英文描述： | Fractional-N Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 4000 MHz, PDSO16 |
| 封裝： | MO-153AB, TSSOP-16 |
| 文件頁數： | 11/24頁 |
| 文件大小： | 354K |
| 代理商： | ADF4153BRU-REEL7 |
ADF4153
PHASE FREQUENCY DETECTOR (PFD) AND
CHARGE PUMP
The PFD takes inputs from the R counter and N counter and
produces an output proportional to the phase and frequency
difference between them. Figure 19 is a simplified schematic.
The PFD includes a fixed delay element that sets the width of
the antibacklash pulse, which is typically 3 ns. This pulse
ensures that there is no dead zone in the PFD transfer function,
and gives a consistent reference spur level.
Rev. A | Page 11 of 24
U3
CLR2
D2
U2
Q2
DOWN
UP
HI
HI
CP
–IN
+IN
CHARGE
PUMP
DELAY
CLR1
Q1
D1
U1
0
Figure 19. PFD Simplified Schematic
MUXOUT AND LOCK DETECT
The output multiplexer on the ADF4153 allows the user to
access various internal points on the chip. The state of
MUXOUT is controlled by M3, M2, and M1 (see Table 8).
Figure 20 shows the MUXOUT section in block diagram form.
The N-channel open-drain analog lock detect should be
operated with an external pull-up resistor of 10 k nominal.
When lock has been detected, it is high with narrow low-going
pulses.
DIGITAL LOCK DETECT
R COUNTER OUTPUT
LOGIC LOW
DGND
CONTROL
MUX
MUXOUT
DV
DD
THREE-STATE OUTPUT
N COUNTER OUTPUT
ANALOG LOCK DETECT
LOGIC HIGH
0
Figure 20. MUXOUT Schematic
INPUT SHIFT REGISTERS
The ADF4153 digital section includes a 4-bit RF R counter, a 9-
bit RF N counter, a 12-bit FRAC counter, and a 12-bit modulus
counter. Data is clocked into the 24-bit shift register on each
rising edge of CLK. The data is clocked in MSB first. Data is
transferred from the shift register to one of four latches on the
rising edge of LE. The destination latch is determined by the
state of the two control bits (C2 and C1) in the shift register.
These are the 2 LSBs, DB1 and DB0, as shown in Figure 2. The
truth table for these bits is shown in Table 5. Table 6 shows a
summary of how the latches are programmed.
PROGRAM MODES
Table 5 through Table 10 show how to set up the program
modes in the ADF4153.
The ADF4153 programmable modulus is double buffered. This
means that two events have to occur before the part uses a new
modulus value. First, the new modulus value is latched into the
device by writing to the R divider register. Second, a new write
must be performed on the N divider register. Therefore, any
time that the modulus value has been updated, the N divider
register must be written to after this, to ensure that the modulus
value is loaded correctly.
Table 5. C2 and C1 Truth Table
Control Bits
C2
C1
Register
0
0
N Divider Register
0
1
R Divider Register
1
0
Control Register
1
1
Noise and Spur Register
相關PDF資料 |
PDF描述 |
|---|---|
| ADF4154 | Fractional-N Frequency Synthesizer |
| ADF4154BCP | Fractional-N Frequency Synthesizer |
| ADF4154BCP-REEL | Fractional-N Frequency Synthesizer |
| ADF4154BCP-REEL7 | Fractional-N Frequency Synthesizer |
| ADF4154BRU | Fractional-N Frequency Synthesizer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADF4153BRUZ | 功能描述:IC SYNTH PLL RF F-N FREQ 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
| ADF4153BRUZ | 制造商:Analog Devices 功能描述:PHASE LOCK LOOP (PLL) IC |
| ADF4153BRUZ-RL | 功能描述:IC FRACTION-N FREQ SYNTH 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4153BRUZ-RL7 | 功能描述:IC FRACTION-N FREQ SYNTH 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4153WYRUZ-RL7 | 功能描述:IC SYNTH PLL RF F-N FREQ 16TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
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