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參數(shù)資料
| 型號： | ADF4216BRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | XO, clock |
| 英文描述： | Dual RF PLL Frequency Synthesizers |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 227K |
| 代理商： | ADF4216BRU |
REV. 0
ADF4216/ADF4217/ADF4218
–5–
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic
Function
1
V
DD
1
Positive Power Supply for the RF Section. Decoupling capacitors to the analog ground plane should be
placed as close as possible to this pin. V
DD
1 should have a value of between 2.7 V and 5.5 V. V
DD
1 must
have the same potential as V
DD
2.
Power Supply for the RF Charge Pump. This should be greater than or equal to V
DD
.
Output from the RF Charge Pump. When enabled this provides
±
I
CP
to the external loop filter, which in
turn drives the external VCO.
Ground Pin for the RF Digital Circuitry.
Input to the RF Prescaler. This low-level input signal is normally ac-coupled to the external VCO.
Complementary Input to the RF Prescaler. This point should be decoupled to the ground plane with a small
bypass capacitor, typically 100 pF.
Ground Pin for the RF Analog Circuitry.
Reference Input. This is a CMOS input with a nominal threshold of V
DD
/2 and an equivalent input resis-
tance of 100 k
.
This input can be driven from a TTL or CMOS crystal oscillator or it can be ac-coupled.
Ground Pin for the IF Digital (Interface and Control Circuitry).
This multiplexer output allows either the IF/RF lock detect, the scaled RF, or the scaled Reference Fre-
quency to be accessed externally. See Table V.
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched
into the 22-bit shift register on the CLK rising edge. This input is a high impedance CMOS input.
Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This input is
a high impedance CMOS input.
Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of
the four latches, the latch being selected using the control bits.
Ground Pin for the IF Analog Circuitry.
Complementary Input to the IF Prescaler. This point should be decoupled to the ground plane with a small
bypass capacitor, typically 100 pF.
Input to the IF Prescaler. This low-level input signal is normally ac-coupled to the external VCO.
Ground Pin for the IF Digital, Interface, and Control Circuitry.
Output from the IF Charge Pump. When enabled this provides
±
I
CP
to the external loop filter, which in turn
drives the external VCO.
Power Supply for the IF Charge Pump. This should be greater than or equal to V
DD
.
Positive Power Supply for the IF, Interface, and Oscillator Sections. Decoupling capacitors to the analog
ground plane should be placed as close as possible to this pin. V
DD
2 should have a value of between 2.7 V
and 5.5 V. V
DD
2 must have the same potential as V
DD
1.
2
3
V
P
1
CP
RF
4
5
6
DGND
RF
RF
IN
A
RF
IN
B
7
8
AGND
RF
REF
IN
9
10
DGND
IF
MUXOUT
11
CLK
12
DATA
13
LE
14
15
AGND
IF
IF
IN
B
16
17
18
IF
IN
A
DGND
IF
CP
IF
19
20
V
P
2
V
DD
2
PIN CONFIGURATION
REF
IN
DGND
IF
CLK
DATA
LE
MUXOUT
RF
IN
A
RF
IN
B
CP
RF
AGND
RF
V
DD
1
DGND
RF
V
DD
2
V
P
2
V
P
1
AGND
IF
IF
IN
B
IF
IN
A
DGND
IF
CP
IF
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
TSSOP
ADF4216/
ADF4217/
ADF4218
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ADF4216BRU-REEL | 功能描述:IC PLL FREQ SYNTHESIZER 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
| ADF4216BRU-REEL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 20-Pin TSSOP T/R |
| ADF4216BRUZ | 制造商:Analog Devices 功能描述:Clock Synthesizer 5MHz to 1.2GHz 20-Pin TSSOP |
| ADF4216BRUZ-RL | 功能描述:IC PLL FREQ SYNTHESIZER 20TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ADF4216BRUZ-RL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 20-Pin TSSOP T/R |
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