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參數(shù)資料
| 型號： | ADF4360-3 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | Integrated Synthesizer and VCO |
| 中文描述： | 綜合合成器和VCO |
| 文件頁數(shù)： | 18/24頁 |
| 文件大小： | 539K |
| 代理商： | ADF4360-3 |
ADF4360-5
APPLICATIONS
DIRECT CONVERSION MODULATOR
Direct conversion architectures are increasingly being used to
implement base station transmitters. Figure 16 shows how ADI
parts can be used to implement such a system.
Rev. 0 | Page 18 of 24
The circuit block diagram shows the AD9761 TxDAC being
used with the AD8349. The use of dual integrated DACs, such
as the AD9761 with its specified ±0.02 dB and ±0.004 dB gain
and offset matching characteristics, ensures minimum error
contribution (over temperature) from this portion of the
signal chain.
The local oscillator is implemented using the ADF4360-5. The
low-pass filter was designed using ADIsimPLL for a channel
spacing of 200 kHz and an open-loop bandwidth of 10 kHz.
The LO ports of the AD8349 can be driven differentially from
the complementary RF
OUT
A and RF
OUT
B outputs of the
ADF4360-5. This gives better performance than a single-ended
LO driver and eliminates the often necessary use of a balun to
convert from a single-ended LO input to the more desirable
differential LO inputs for the AD8349. The typical rms phase
noise (100 Hz to 100 kHz) of the LO in this configuration is 1.09°.
The AD8349 accepts LO drive levels from 10 dBm to 0 dBm.
The optimum LO power can be software programmed on the
ADF4360-5, which allows levels from 13.5 dBm to 4.5 dBm
from each output.
The RF output is designed to drive a 50 load but must be ac-
coupled, as shown in Figure 16. If the I and Q inputs are driven
in quadrature by 2 V p-p signals, the resulting output power
from the modulator is approximately 2 dBm.
AD9761
TxDAC
AD8349
REFIO
FSADJ
MODULATED
DIGITAL
DATA
QOUTB
IOUTA
IOUTB
QOUTA
2k
LOW-PASS
FILTER
LOW-PASS
FILTER
S
ADF4360-5
V
VCO
C
N
V
VCO
V
VCO
CPGND
1
AGND
9
DGNDRF
OUT
B
15
RF
OUT
A
CP
1nF
8200pF
270pF
10nF
47nH
47nH
3.9pF
3.9pF
100pF
TO
RF PA
5.1nH
5.1nH
1nF
1nF
4.7k
8.2k
4.3k
R
SET
C
C
LE
DATA
CLK
REF
IN
FREF
IN
V
TUNE
DV
DD
AV
DD
CE MUXOUT
VPS1
IBBP
IBBN
QBBP
QBBN
LOIP
LOIN
VPS2
5
4
24
7
20
23
2
21
6
14
16
17
18
19
13
3
8
10
11
22
12
V
DD
LOCK
DETECT
PHASE
SPLITTER
0
51
10
μ
F
Figure 16. Direct Conversion Modulator
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PDF描述 |
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| ADF4360-3BCPRL | Integrated Synthesizer and VCO |
| ADF4360-3BCPRL7 | Integrated Synthesizer and VCO |
| ADF4360-4 | Integrated Synthesizer and VCO |
| ADF4360-4BCPRL | Integrated Synthesizer and VCO |
| ADF4360-4BCPRL7 | Integrated Synthesizer and VCO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADF4360-3BCP | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:INT. SYNTHESIZER & VCO - 1600 - 1950 MHZ - Bulk 制造商:Analog Devices 功能描述:IC SYNTHESIZER PLL |
| ADF4360-3BCPRL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP T/R |
| ADF4360-3BCPRL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP T/R |
| ADF4360-3BCPU1 | 制造商:Analog Devices 功能描述:PLL FREQ SYNTHESIZER SGL 24LFCSP EP - Bulk |
| ADF4360-3BCPZ | 功能描述:IC SYNTHESIZER VCO 24-LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
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