欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: ADF4360-4BCPRL7
廠商: ANALOG DEVICES INC
元件分類: 無繩電話/電話
英文描述: Integrated Synthesizer and VCO
中文描述: TELECOM, CELLULAR, BASEBAND CIRCUIT, QCC24
封裝: 4 X 4 MM, MO-220-VGGD-2, LFCSP-24
文件頁數: 9/24頁
文件大小: 539K
代理商: ADF4360-4BCPRL7
ADF4360-5
CIRCUIT DESCRIPTION
REFERENCE INPUT SECTION
The reference input stage is shown in Figure 10. SW1 and SW2
are normally closed switches. SW3 is normally open. When
power-down is initiated, SW3 is closed, and SW1 and SW2 are
opened. This ensures that there is no loading of the REF
IN
pin
on power-down.
Rev. 0 | Page 9 of 24
0
BUFFER
TO R COUNTER
REF
IN
100k
NC
SW2
SW3
NO
NC
SW1
POWER-DOWN
CONTROL
Figure 10. Reference Input Stage
PRESCALER (P/P + 1)
The dual-modulus prescaler (P/P + 1), along with the A and B
counters, enables the large division ratio,
N
, to be realized (
N
=
BP
+
A
). The dual-modulus prescaler, operating at CML levels,
takes the clock from the VCO and divides it down to a manage-
able frequency for the CMOS A and B counters. The prescaler is
programmable. It can be set in software to 8/9, 16/17, or 32/33
and is based on a synchronous 4/5 core. There is a minimum
divide ratio possible for fully contiguous output frequencies;
this minimum is determined by P, the prescaler value, and is
given by (
P
2
P
).
A AND B COUNTERS
The A and B CMOS counters combine with the dual-modulus
prescaler to allow a wide range division ratio in the PLL feed-
back counter. The counters are specified to work when the pre-
scaler output is 300 MHz or less. Thus, with a VCO frequency of
2.5 GHz, a prescaler value of 16/17 is valid, but a value of 8/9 is
not valid.
Pulse Swallow Function
The A and B counters, in conjunction with the dual-modulus
prescaler, make it possible to generate output frequencies that
are spaced only by the reference frequency divided by
R
. The
VCO frequency equation is
(
)
R
f
A
B
P
f
REFIN
VCO
/
×
]
+
×
[
=
where:
f
VCO
is the output frequency of the VCO.
P
is the preset modulus of the dual-modulus prescaler (8/9,
16/17, and so on).
B
is the preset divide ratio of the binary 13-bit counter (3 to 8191).
A
is the preset divide ratio of the binary 5-bit swallow counter (0 to 31).
f
REFIN
is the external reference frequency oscillator.
N = BP + A
TO PFD
FROM VCO
N DIVIDER
MODULUS
CONTROL
LOAD
LOAD
13-BIT B
COUNTER
5-BIT A
COUNTER
PRESCALER
P/P+1
0
Figure 11. A and B Counters
R COUNTER
The 14-bit R counter allows the input reference frequency to
be divided down to produce the reference clock to the phase
frequency detector (PFD). Division ratios from 1 to 16,383 are
allowed.
PFD AND CHARGE PUMP
The PFD takes inputs from the R counter and N counter (
N
=
BP
+
A
) and produces an output proportional to the phase and
frequency difference between them. Figure 12 is a simplified
schematic. The PFD includes a programmable delay element
that controls the width of the antibacklash pulse. This pulse
ensures that there is no dead zone in the PFD transfer function
and minimizes phase noise and reference spurs. Two bits in the
R counter latch, ABP2 and ABP1, control the width of the pulse
(see Table 9).
0
PROGRAMMABLE
DELAY
U3
CLR2
Q2
D2
U2
CLR1
Q1
D1
CHARGE
PUMP
DOWN
UP
HI
HI
U1
ABP1
ABP2
R DIVIDER
N DIVIDER
CP OUTPUT
R DIVIDER
N DIVIDER
CP
CPGND
V
P
Figure 12. PFD Simplified Schematic and Timing (In Lock)
相關PDF資料
PDF描述
ADF4360-1BCPRL7 Integrated Synthesizer and VCO
ADF4360-0BCPRL7 Integrated Synthesizer and VCO
ADF4360-0 Integrated Synthesizer and VCO
ADF4360-0BCP Integrated Synthesizer and VCO
ADF4360-0BCPRL Integrated Synthesizer and VCO
相關代理商/技術參數
參數描述
ADF4360-4BCPZ 功能描述:IC INT SYNTH/VCO SEALED 24-LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP(0.175",4.40mm 寬) 供應商設備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR
ADF4360-4BCPZ 制造商:Analog Devices 功能描述:IC FREQ SYNTHESIZER & VCO 1.45GHZ LFCSP 制造商:Analog Devices 功能描述:IC, FREQ SYNTHESIZER & VCO 1.45GHZ LFCSP
ADF4360-4BCPZKL1 制造商:Analog Devices 功能描述:
ADF4360-4BCPZRL 功能描述:IC SYNTHESIZER VCO 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器,PLL,頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML,PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤,16-MLF? 供應商設備封裝:16-MLF?(3x3) 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND
ADF4360-4BCPZRL7 功能描述:IC SYNTHESIZER VCO 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器,PLL,頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML,PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤,16-MLF? 供應商設備封裝:16-MLF?(3x3) 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND
主站蜘蛛池模板: 山西省| 鄂托克旗| 扶余县| 清丰县| 南汇区| 南澳县| 塔城市| 丰宁| 高邮市| 黑山县| 宁都县| 长春市| 巩留县| 阳江市| 锡林浩特市| 宁强县| 太湖县| 都匀市| 宁武县| 萨嘎县| 盖州市| 汝南县| 同德县| 平顺县| 沭阳县| 商河县| 泸西县| 桃园县| 寿光市| 宿州市| 东宁县| 长治市| 应用必备| 汤原县| 扎兰屯市| 宁蒗| 湘西| 定结县| 宜都市| 基隆市| 凌云县|