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參數資料
| 型號： | ADG1204YCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | 2 pF Off Capacitance, 1 pC Charge Injection, +-15 V/12 V 4:1 iCMOS Multiplexer |
| 中文描述： | 4-CHANNEL, SGL ENDED MULTIPLEXER, QCC12 |
| 封裝： | MO-220-VEED, LFCSP-14 |
| 文件頁數： | 9/16頁 |
| 文件大?。?/td> | 453K |
| 代理商： | ADG1204YCP |
Preliminary Technical Data
ADG1204
TERMINOLOGY
I
DD
The positive supply current.
Rev. PrD | Page 9 of 16
I
SS
The negative supply current.
V
D
(V
S
)
The analog voltage on Terminals D and S.
R
ON
The ohmic resistance between D and S.
R
FLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance, as measured over the specified
analog signal range.
I
S
(Off)
The source leakage current with the switch off.
I
D
(Off)
The drain leakage current with the switch off.
I
D
, I
S
(On)
The channel leakage current with the switch on.
V
INL
The maximum input voltage for Logic 0.
V
INH
The minimum input voltage for Logic 1.
I
INL
(I
INH
)
The input current of the digital input.
C
S
(Off)
The off switch source capacitance, which is measured with
reference to ground.
C
D
(Off)
The off switch drain capacitance, which is measured with
reference to ground.
C
D
, C
S
(On)
The on switch capacitance, which is measured with reference to
ground.
C
IN
The digital input capacitance.
t
ON
(EN)
The delay between applying the digital control input and the
output switching on. See Figure 24, Test Circuit 4.
t
OFF
(EN)
The delay between applying the digital control input and the
output switching off.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
THD + N
The ratio of the harmonic amplitude plus noise of the signal to
the fundamental.
t
TRANS
The delay time between the 50% and 90% points of the digital
input and switch on condition when switching from one
address state to another.
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