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參數(shù)資料
| 型號(hào)： | ADG3249BRJ-R2 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | 2.5 V/3.3 V, 2:1 Multiplexer/ Demultiplexer Bus Switch |
| 中文描述： | 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO8 |
| 封裝： | MO-178BA, SOT-23, 8 PIN |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 220K |
| 代理商： | ADG3249BRJ-R2 |
REV. 0
–4–
ADG3249
TERMINOLOGY
V
CC
GND
V
INH
V
INL
I
I
I
OZ
I
OL
V
P
Positive Power Supply Voltage.
Ground (0 V) Reference.
Minimum Input Voltage for Logic 1.
Maximum Input Voltage for Logic 0.
Input Leakage Current at the Control Inputs.
OFF State Leakage Current. It is the maximum leakage current at the switch pin in the OFF state.
ON State Leakage Current. It is the maximum leakage current at the switch pin in the ON state.
Maximum Pass Voltage. The maximum pass voltage relates to the clamped output voltage of an NMOS device when
the switch input voltage is equal to the supply voltage.
Ohmic Resistance Offered by a Switch in the ON State. It is measured at a given voltage by forcing a specified
amount of current through the switch.
ON Resistance Match between Any Two Channels, i.e., R
ON
max to R
ON
min.
OFF Switch Capacitance.
ON Switch Capacitance.
Control Input Capacitance. This consists of IN,
SEL
, and
EN
.
Quiescent Power Supply Current. This current represents the leakage current between the V
CC
and ground pins.
It is measured when all control inputs are at a logic high or low level and the switches are OFF.
Extra power supply current component for the
EN
control input when the input is not driven at the supplies.
Data Propagation Delay through the Switch in the ON State. Propagation delay is related to the RC time constant
R
ON
×
C
L
, where C
L
is the load capacitance.
Bus Enable Times. These are the times taken to cross the V
T
voltage at the switch output when the switch turns on
in response to the control signal,
EN
.
Bus Disable Times. These are the time taken to place the switch in the high impedance OFF state in response to the
control signal. They are measured as the time taken for the output voltage to change by V from the original
quiescent level, with reference to the logic level transition at the control input. (Refer to Figure 3 for enable
and disable times.)
On or Off Time. Measured between the 90% points of both switches when switching fom one to another.
Time taken to switch from one channel to the other, measured from 50% of the IN signal to 90% of the
OUT signal.
Maximum Rate at which Data Can Be Passed through the Switch.
Peak-to-Peak Value of the Sum of the Deterministic and Random Jitter of the Switch Channel.
R
ON
R
ON
C
X
OFF
C
X
ON
C
IN
, C
SEL
, C
EN
I
CC
I
CC
t
PLH
, t
PHL
t
PZH
, t
PZL
t
PHZ
, t
PLZ
t
BBM
t
TRANS
Max Data Rate
Channel Jitter
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