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參數(shù)資料
型號(hào): ADG774
廠商: Analog Devices, Inc.
英文描述: CMOS 3 V/5 V, Wide Bandwidth Quad 2:1 Mux
中文描述: 3伏的CMOS / 5伏,寬帶四2:1復(fù)用
文件頁(yè)數(shù): 4/8頁(yè)
文件大?。?/td> 119K
代理商: ADG774
ADG774
–4–
REV. 0
ORDERING GUIDE
Model
Temperature Range
–40
°
C to +85
°
C
–40
°
C to +85
°
C
Package Descriptions
Package Options
ADG774BR
ADG774BRQ
R = 0.15" Small Outline IC (SOIC)
RQ = 0.15" Quarter Size Outline Package (QSOP)
R-16A
RQ-16
PIN CONFIGURATION
(SOIC/QSOP)
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN
S1A
S1B
D1
S2A
S2B
D2
GND
V
DD
EN
S4A
S4B
D4
S3A
S3B
D3
ADG774
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG774 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
°
C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Storage Temperature Range . . . . . . . . . . . . . –65
°
C to +150
°
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150
°
C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 100
°
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215
°
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220
°
C
QSOP Package, Power Dissipation . . . . . . . . . . . . . . . 566 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . 149.97
°
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215
°
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220
°
C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maxi-
mum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
TERMINOLOGY
V
DD
GND
S
D
IN
EN
R
ON
R
ON
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Logic Control Input.
Ohmic resistance between D and S.
On Resistance match between any two channels
i.e., R
ON
max – R
ON
min.
Flatness is defined as the difference between the
maximum and minimum value of on resistance
as measured over the specified analog signal
range.
Source Leakage Current with the switch “OFF.”
Drain Leakage Current with the switch “OFF.”
Channel Leakage Current with the switch “ON.”
Analog Voltage on Terminals D, S.
“OFF” Switch Source Capacitance.
“OFF” Switch Drain Capacitance.
C
D
, C
S
(ON) “ON” Switch Capacitance.
t
ON
Delay between applying the digital control input
and the output switching on. See Test Circuit 4.
t
OFF
Delay between applying the digital control input
and the output switching Off.
t
D
“OFF” time or “ON” time measured between
the 90% points of both switches, when switching
from one address state to another. See Test
Circuit 5.
Crosstalk
A measure of unwanted signal that is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through an
“OFF” switch.
Bandwidth
Frequency response of the switch in the ON
state measured at 3 dB down.
Distortion
R
FLAT(ON)
/R
L
R
FLAT(ON)
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
(OFF)
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